DM7404N datasheet, PDF - EEWORLD Datasheet

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DM7404N: DescriptionTTL/H/L SERIES, HEX 1-INPUT INVERT GATE, PDIP14; Categorysemiconductor logic; File Size107KB，6 Pages; ManufacturerNational Semiconductor（TI ）; Websitehttp://www.ti.com

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DM7404N Overview

TTL/H/L SERIES, HEX 1-INPUT INVERT GATE, PDIP14

DM7404N Parametric

Parameter Name	Attribute value
Number of functions	6
Number of terminals	14
Maximum operating temperature	70 Cel
Minimum operating temperature	0.0 Cel
Maximum supply/operating voltage	5.25 V
Minimum supply/operating voltage	4.75 V
Rated supply voltage	5 V
Processing package description	0.300 INCH, PLASTIC, MS-001, DIP-14
state	ACTIVE
Craftsmanship	TTL
packaging shape	RECTANGULAR
Package Size	IN-LINE
Terminal form	THROUGH-HOLE
Terminal spacing	2.54 mm
terminal coating	TIN LEAD
Terminal location	DUAL
Packaging Materials	PLASTIC/EPOXY
Temperature level	COMMERCIAL
series	TTL/H/L
Logic IC type	INVERT
Number of inputs	1
propagation delay TPD	22 ns

DM7404N Related Products

	DM7404N	DM5404J	DM5404W	DM7404M	5404FMQB	5404DMQB	5404
Description	TTL/H/L SERIES, HEX 1-INPUT INVERT GATE, PDIP14	TTL/H/L SERIES, HEX 1-INPUT INVERT GATE, PDIP14	TTL/H/L SERIES, HEX 1-INPUT INVERT GATE, PDIP14	TTL/H/L SERIES, HEX 1-INPUT INVERT GATE, PDIP14	TTL/H/L SERIES, HEX 1-INPUT INVERT GATE, PDIP14	TTL/H/L SERIES, HEX 1-INPUT INVERT GATE, PDIP14	TTL/H/L SERIES, HEX 1-INPUT INVERT GATE, PDIP14
Number of functions	6	6	6	6	6	6	6
Number of terminals	14	14	14	14	14	14	14
Maximum operating temperature	70 Cel	125 °C	125 °C	70 Cel	125 °C	125 °C	70 Cel
Minimum operating temperature	0.0 Cel	-55 °C	-55 °C	0.0 Cel	-55 °C	-55 °C	0.0 Cel
Terminal form	THROUGH-HOLE	THROUGH-HOLE	FLAT	THROUGH-HOLE	FLAT	THROUGH-HOLE	THROUGH-HOLE
Terminal location	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL
Temperature level	COMMERCIAL	MILITARY	MILITARY	COMMERCIAL	MILITARY	MILITARY	COMMERCIAL
series	TTL/H/L	TTL/H/L	TTL/H/L	TTL/H/L	TTL/H/L	TTL/H/L	TTL/H/L
Is it Rohs certified?	-	incompatible	incompatible	-	incompatible	incompatible	-
Maker	-	National Semiconductor（TI ）	National Semiconductor（TI ）	-	National Semiconductor（TI ）	National Semiconductor（TI ）	-
package instruction	-	DIP, DIP14,.3	CERAMIC, FP-14	-	CERAMIC, FP-14	CERAMIC, DIP-14	-
Reach Compliance Code	-	unknow	unknow	-	unknow	unknown	-
JESD-30 code	-	R-GDIP-T14	R-GDFP-F14	-	R-GDFP-F14	R-GDIP-T14	-
JESD-609 code	-	e0	e0	-	e0	e0	-
Logic integrated circuit type	-	INVERTER	INVERTER	-	INVERTER	INVERTER	-
MaximumI(ol)	-	0.016 A	0.016 A	-	0.016 A	0.016 A	-
Number of entries	-	1	1	-	1	1	-
Package body material	-	CERAMIC, GLASS-SEALED	CERAMIC, GLASS-SEALED	-	CERAMIC, GLASS-SEALED	CERAMIC, GLASS-SEALED	-
encapsulated code	-	DIP	QFF	-	QFF	DIP	-
Encapsulate equivalent code	-	DIP14,.3	FL14,.3	-	FL14,.3	DIP14,.3	-
Package shape	-	RECTANGULAR	RECTANGULAR	-	RECTANGULAR	RECTANGULAR	-
Package form	-	IN-LINE	FLATPACK	-	FLATPACK	IN-LINE	-
Peak Reflow Temperature (Celsius)	-	NOT SPECIFIED	NOT SPECIFIED	-	NOT SPECIFIED	NOT SPECIFIED	-
power supply	-	5 V	5 V	-	5 V	5 V	-
Maximum supply current (ICC)	-	33 mA	33 mA	-	33 mA	33 mA	-
propagation delay (tpd)	-	15 ns	15 ns	-	15 ns	15 ns	-
Certification status	-	Not Qualified	Not Qualified	-	Not Qualified	Not Qualified	-
Schmitt trigger	-	NO	NO	-	NO	NO	-
Maximum seat height	-	5.08 mm	2.03 mm	-	2.03 mm	5.08 mm	-
Maximum supply voltage (Vsup)	-	5.5 V	5.5 V	-	5.5 V	5.5 V	-
Minimum supply voltage (Vsup)	-	4.5 V	4.5 V	-	4.5 V	4.5 V	-
Nominal supply voltage (Vsup)	-	5 V	5 V	-	5 V	5 V	-
surface mount	-	NO	YES	-	YES	NO	-
technology	-	TTL	TTL	-	TTL	TTL	-
Terminal surface	-	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	-	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	-
Terminal pitch	-	2.54 mm	1.27 mm	-	1.27 mm	2.54 mm	-
Maximum time at peak reflow temperature	-	NOT SPECIFIED	NOT SPECIFIED	-	NOT SPECIFIED	NOT SPECIFIED	-
width	-	7.62 mm	6.35 mm	-	6.35 mm	7.62 mm	-

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