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WMS128K8C-85DEMEA

Description
Standard SRAM, 128KX8, 85ns, CMOS, CDSO32, CERAMIC, SOJ-32
Categorystorage    storage   
File Size107KB,8 Pages
ManufacturerWhite Electronic Designs Corporation
Websitehttp://www.wedc.com/
Download Datasheet Parametric View All

WMS128K8C-85DEMEA Overview

Standard SRAM, 128KX8, 85ns, CMOS, CDSO32, CERAMIC, SOJ-32

WMS128K8C-85DEMEA Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerWhite Electronic Designs Corporation
package instructionCERAMIC, SOJ-32
Reach Compliance Codeunknown
Maximum access time85 ns
Other features2V DATA RETENTION DEVICE AVAILABLE (LOW POWER VERSION)
JESD-30 codeR-CDSO-J32
length21.1 mm
memory density1048576 bit
Memory IC TypeSTANDARD SRAM
memory width8
Number of functions1
Number of terminals32
word count131072 words
character code128000
Operating modeASYNCHRONOUS
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
organize128KX8
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codeSOJ
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Certification statusNot Qualified
Maximum seat height3.96 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelMILITARY
Terminal formJ BEND
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
WMS128K8-XXX
HI-RELIABILITY PRODUCT
128Kx8 MONOLITHIC SRAM, SMD 5962-96691
(pending)
FEATURES
s
Access Times 70, 85, 100, 120ns
s
Revolutionary, Center Power/Ground Pinout
JEDEC Approved
• 32 lead Ceramic SOJ (Package 101)
s
Evolutionary, Corner Power/Ground Pinout
JEDEC Approved
• 32 pin Ceramic DIP (Package 300)
• 32 lead Ceramic SOJ (Package 101)
• 32 lead Ceramic Flat Pack (Package 206)
s
MIL-STD-883 Compliant Devices Available
s
Commercial, Industrial and Military Temperature Range
s
5 Volt Power Supply
s
Low Power CMOS
s
2V Data Retention Devices Available
(Low Power Version)
s
TTL Compatible Inputs and Outputs
REVOLUTIONARY PINOUT
32 CSOJ (DR)
EVOLUTIONARY PINOUT
32 DIP
32 CSOJ (DE)
32 FLATPACK (FE)
TOP VIEW
A0
A1
A2
A3
CS
I/O1
I/O2
V
CC
GND
I/O3
I/O4
WE
A4
A5
A6
A7
TOP VIEW
A16
A15
A14
A13
OE
I/O8
I/O7
GND
V
CC
I/O6
I/O5
A12
A11
A10
A9
A8
NC
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
V
CC
A15
NC/CS2*
WE
A13
A8
A9
A11
OE
A10
CS
I/O7
I/O6
I/O5
I/O4
I/O3
* NC for single chip select devices
CS
2
for dual chip select devices
PIN DESCRIPTION
A
0-16
I/O
0-7
CS
OE
WE
V
CC
GND
Address Inputs
Data Input/Output
Chip Select
Output Enable
Write Enable
+5.0V Power
Ground
February 2000 Rev. 2
1
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com

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