Latch-up Current.................................................... > 200 mA
Operating Range
Range
Industrial
Ambient Temperature
–40°C to +85°C
V
CC
2.7V to 3.6V
Product Portfolio
Power Dissipation
V
CC
Range (V)
Product
CY62148VLL
Min.
2.7
Typ.
[3]
Max.
3.6
Speed
(ns)
70
Operating I
CC
, (mA)
Typ.
7
[3]
Standby I
SB2
, (µA)
Typ.
2
[3]
Maximum
15
Maximum
20
3.0
Electrical Characteristics
Over the Operating Range
CY62148V-70
Parameter
V
OH
V
OL
V
IH
V
IL
I
IX
I
OZ
I
CC
Description
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
Input Load Current
V
CC
Operating Supply
Current
Automatic CE
Power-down Current—
CMOS Inputs
Automatic CE
Power-down Current—
CMOS Inputs
GND < V
I
< V
CC
I
OUT
= 0 mA, f = f
MAX
= 1/t
RC
CMOS Levels
V
CC
= 3.6V
I
OH
= –1.0 mA
I
OL
= 2.1 mA
Test Conditions
V
CC
= 2.7V
V
CC
= 2.7V
V
CC
= 3.6V
V
CC
= 2.7V
2.2
–0.5
–1
–1
+1
+1
7
1
2
Min.
2.4
0.4
V
CC
+
0.5V
0.8
+1
+1
15
2
20
Typ.
[3]
Max.
Unit
V
V
V
V
µA
µA
mA
mA
µA
Output Leakage Current GND < V
O
< V
CC
, Output Disabled
I
OUT
= 0 mA, f = 1 MHz CMOS Levels
I
SB1
CE > V
CC
−
0.3V, V
IN
> V
CC
−
0.3V or V
IN
< 0.3V, f =
f
MAX
CE > V
CC
−
0.3V
V
IN
> V
CC
−
0.3V
or V
IN
< 0.3V, f = 0
V
CC
= 3.6V
I
SB2
Notes:
2. V
IL(min.)
= –2.0V for pulse durations less than 20 ns.
3. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V
CC
= V
CC(typ.)
, T
A
= 25°C.
Document #: 38-05070 Rev. *A
Page 2 of 9
CY62148V MoBL
Capacitance
[4]
Parameter
C
IN
C
OUT
Description
Input Capacitance
Output Capacitance
Test Conditions
T
A
= 25°C, f = 1 MHz,
V
CC
= 3.0V
Max.
6
8
Unit
pF
pF
Thermal Resistance
Parameter
Θ
JA
Θ
JC
Description
Thermal
(Junction to Ambient)
Resistance
[4]
Test Conditions
Still Air, soldered on a 4.25 x 1.125 inch, 4-layer
printed circuit board
Others
TBD
TBD
BGA
TBD
TBD
Units
°C/W
°C/W
Thermal Resistance
[4]
(Junction to Case)
AC Test Loads and Waveforms
R1
V
CC
OUTPUT
50 pF
INCLUDING
JIG AND
SCOPE
R2
V
CC
TYP
10%
GND
Rise time: 1V/ns
Equivalent to:
THÉVENIN EQUIVALENT
R
th
OUTPUT
V
th
ALL INPUT PULSES
90%
90%
10%
Fall time: 1V/ns
Parameters
R1
R2
R
TH
V
TH
3.0V
1105
1550
645
1.75V
Unit
Ohms
Ohms
Ohms
Volts
Data Retention Characteristics
(Over the Operating Range)
Parameter
V
DR
I
CCDR
t
CDR[4]
t
R[5]
Description
V
CC
for Data Retention
Data Retention Current
Chip Deselect to Data
Retention Time
Operation Recovery Time
V
CC
= 1.0V, CE > V
CC
−
0.3V, V
IN
> V
CC
−
0.3V or V
IN
<
0.3V; No input may exceed V
CC
+ 0.3V
0
t
RC
Conditions
Min.
1.0
0.2
Typ.
[3]
Max.
3.6
5.5
Unit
V
µA
ns
ns
Data Retention Waveform
DATA RETENTION MODE
V
CC
1.0V
t
CDR
CE
V
DR
> 1.0 V
1.0V
t
R
Notes:
4. Tested initially and after any design or process changes that may affect these parameters.
5. Full-device AC operation requires linear V
CC
ramp from V
DR
to V
CC(min.)
> 10
µs
or stable at V
CC(min.)
>
10
µs.
Document #: 38-05070 Rev. *A
Page 3 of 9
CY62148V MoBL
Switching Characteristics
Over the Operating Range
Parameter
Read Cycle
t
RC
t
AA
t
OHA
t
ACE
t
DOE
t
LZOE
t
HZOE
t
LZCE
t
HZCE
t
PU
t
PD
Write Cycle
t
WC
t
SCE
t
AW
t
HA
t
SA
t
PWE
t
SD
t
HD
t
HZWE
t
LZWE
[9, 10]
[6]
CY62148V-70
Description
Read Cycle Time
Address to Data Valid
Data Hold from Address Change
CE LOW to Data Valid
OE LOW to Data Valid
OE LOW to Low-Z
[7]
OE HIGH to High-Z
[8]
CE LOW to Low-Z
[7]
CE HIGH to High-Z
[7, 8]
CE LOW to Power-up
CE HIGH to Power-down
Write Cycle Time
CE LOW to Write End
Address Set-up to Write End
Address Hold from Write End
Address Set-up to Write Start
WE Pulse Width
Data Set-up to Write End
Data Hold from Write End
WE LOW to High-Z
[7, 8]
WE HIGH to Low-Z
[7]
10
70
60
60
0
0
50
30
0
25
0
70
10
25
5
25
10
70
35
Min.
70
70
Max.
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Switching Waveforms
Read Cycle No. 1
[11, 12]
t
RC
ADDRESS
t
OHA
DATA OUT
PREVIOUS DATA VALID
t
AA
DATA VALID
Notes:
6. Test conditions assume signal transition time of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to V
CC(typ.)
, and output loading of the
specified I
OL
/I
OH
and 30 pF load capacitance.
7. At any given temperature and voltage condition, t
HZCE
is less than t
LZCE
, t
HZOE
is less than t
LZOE
, and t
HZWE
is less than t
LZWE
for any given device.
8. t
HZOE
, t
HZCE
, and t
HZWE
are specified with C
L
= 5 pF as in (b) of AC Test Loads. Transition is measured ±200 mV from steady-state voltage.
9. The internal write time of the memory is defined by the overlap of CE LOW and WE LOW. Both signals must be LOW to initiate a write and either signal can
terminate a write by going HIGH. The data input set-up and hold timing should be referenced to the rising edge of the signal that terminates the write.
10. The minimum write cycle time for Write Cycle #3 (WE controlled, OE LOW) is the sum of t
HZWE
and t
SD
.
Document #: 38-05070 Rev. *A
Page 4 of 9
CY62148V MoBL
Switching Waveforms
(continued)
Read Cycle No. 2
[12, 13]
CE
t
ACE
OE
t
DOE
t
LZOE
HIGH IMPEDANCE
t
LZCE
V
CC
SUPPLY
CURRENT
t
PU
50%
[9, 14, 15]
t
RC
t
HZOE
t
HZCE
DATA VALID
t
PD
HIGH
IMPEDANCE
DATA OUT
I
CC
50%
I
SB
Write Cycle No. 1 (WE Controlled)
t
WC
ADDRESS
CE
t
AW
WE
t
SA
t
PWE
t
HA
OE
t
SD
DATA I/O
NOTE
16
t
HZOE
DATA
IN
VALID
t
HD
Write Cycle No. 2 (CE Controlled)
[9, 14, 15]
t
WC
ADDRESS
CE
t
SA
t
AW
WE
t
SD
DATA I/O
DATA
IN
VALID
t
HD
t
HA
t
SCE
Notes:
11. Device is continuously selected. OE, CE = V
IL
.
12. WE is HIGH for read cycle.
13. Address valid prior to or coincident with CE transition LOW.
14. Data I/O is high impedance if OE = V
IH
.
15. If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state.
16. During this period, the I/Os are in output state and input signals should not be applied.
The same data packet! The PC and LED screen communicate normally! The mini2440 serial port and LED screen communication have no response! Then connect the mini2440 and PC and check the serial port dat...
I learned from E2E that motorware has been upgraded to version 15. I have been downloading since the first version, and now it is version 15. To be honest, I like and dislike this upgrade. Why do I sa...
The client sends data packets through the socket periodically. Each packet is about 1K. If a small number is sent in a cycle, it is normal. If too much is sent, the connection will be disconnected. Wh...
[i=s]This post was last edited by Brother High on 2014-10-21 16:07[/i] :Cry:I got the Open1081 board a few days ago, and I have quite enough time these two days, so I decided to play with it.However, ...
If hot boot is not considered, can the 64KB memory at 0xffff0000 be used to store data via DMA? If so, is there anything I need to pay attention to? Is it OK to use mmap in Linux? Thank you....
1. 3G/4G/5G long-distance wireless transmission equipmentThe "far" of 3G/4G/5G long-distance wireless transmission equipment lies in the fact that it uses the power of the Internet. With the help of D...
【JDPCB】Qisda is introducing smart factories in phases. Chairman Chen Qihong said yesterday (25th) that through high automation, order delivery can be accelerated. The current benefits have reached a...[Details]
On April 24, Sungrow released its annual financial report. The report shows that in 2017, Sungrow's global shipments reached 16.5GW, of which domestic shipments reached 13.2GW, a year-on-year incre...[Details]
Chip: STM32F103C8T6 Application Pin: Output: PA0, PA1 TIM2 CH2 channel To achieve 50HZ (20ms) adjustable PWM output on the PA1 pin, set the system TIMx_CNT=8MHZ=8000 000HZ, set TIMx_PSC=800-1, then T...[Details]
introduction STM32 has many registers, which are difficult to remember, so the official packaged two sets of library functions. One is the standard library, but the official has not updated it on F7,...[Details]
Development Background: 1. Main chip - STM32F207VCT6; 2. TCP/IP protocol stack - LWIP, transplanted based on ST routines; 3. Operating system - none (bare metal); Anomalies: 1. Power on the device wi...[Details]
Serial Port: 一. USART_ITConfig(USART1, USART_IT_TXE, ENABLE): As long as the transmit register is empty, there will always be an interrupt. Therefore, if you are not sending data, turn off the tran...[Details]
Our photovoltaic power station starts working at 5:30 in the morning. When you are still sleeping, the inverter starts working to make money!
Some people are skeptical. The sun hasn't even...[Details]
With the implementation of the first version of the NR sub-6GHz draft of 3GPP in December 2017, and the subsequent Phase 2 drafts, semiconductor manufacturers and terminal manufacturers began to ...[Details]
This program mainly uses the comparison output function of the timer to generate PWM waves to control the LED. The comparison output of timer A corresponds to P2.3 P2.4. Therefore, a matching working...[Details]
From concept proposal, prototype exploration, technology accumulation to product iteration and industrial development,
VR
has gradually expanded from the military market to the consumer market...[Details]
1. Brief description A summary of "How to build uClinux kernel transplantation on ARMSYS development board with S3C44B0X as core", including the analysis of Bootloader function and the key co...[Details]
In recent years, in order to meet the needs of social development, more and more companies have entered the fields of smart phones, artificial intelligence,
VR
, AR, etc. After seeing the d...[Details]
Similar to the development trend of photovoltaic modules, photovoltaic inverters are also one of the examples of China's successful localization of manufacturing and leading the global market and tech...[Details]
In recent years, in addition to Huawei Kirin
chips
in the mobile phone industry
, Xiaomi's own processor Pengpai S1, AI
chip
start-ups such as Cambrian, Horizon, and Deephi Technolo...[Details]
Site conditions: 1. AD acquisition, DMA transmission; AD is set to single-channel continuous mode, DMA is set to single-shot mode. The upper threshold of the AD analog watchdog setting is less than t...[Details]
Embedded System
京公网安备 11010802033920号
EEWORLD
