SSM3J134TU
TOSHIBA Field-Effect Transistor Silicon P-Channel MOS Type (U-MOSⅥ)
SSM3J134TU
○
Power Management Switch Applications
•
•
1.5 V drive
Low ON-resistance: R
DS(ON)
= 240 mΩ (max) (@V
GS
= -1.5 V)
R
DS(ON)
= 168 mΩ (max) (@V
GS
= -1.8 V)
R
DS(ON)
= 123 mΩ (max) (@V
GS
= -2.5 V)
R
DS(ON)
= 93 mΩ (max) (@V
GS
= -4.5 V)
Unit: mm
Absolute Maximum Ratings
(Ta = 25°C)
Characteristic
Drain-Source voltage
Gate-Source voltage
Drain current
DC
Pulse
Symbol
V
DSS
V
GSS
I
D
(Note 1)
I
DP
(Note 1)
P
D
(Note 2)
t < 1s
T
ch
T
stg
Rating
-20
±
8
-3.2
-6.4
500
1000
150
−55
to 150
Unit
V
V
A
Power dissipation
Channel temperature
Storage temperature range
mW
°C
°C
1: Gate
Note: Using continuously under heavy loads (e.g. the application of high
temperature/current/voltage and the significant change in
temperature, etc.) may cause this product to decrease in the
reliability significantly even if the operating conditions (i.e.
operating temperature/current/voltage, etc.) are within the
absolute maximum ratings.
Please design the appropriate reliability upon reviewing the
Toshiba Semiconductor Reliability Handbook (“Handling
Precautions”/“Derating Concept and Methods”) and individual
reliability data (i.e. reliability test report and estimated failure rate,
etc).
Note 1: The channel temperature should not exceed 150°C during use.
Note 2: Mounted on a FR4 board.
2
(25.4 mm
×
25.4 mm
×
1.6 mm, Cu Pad: 645 mm )
UFM
JEDEC
JEITA
TOSHIBA
2: Source
3: Drain
―
―
2-2U1A
Weight: 6.6mg (typ.)
Marking
3
Equivalent Circuit
(top view)
3
JJM
1
2
1
2
Start of commercial production
2011-02
1
2014-03-01
SSM3J134TU
Electrical Characteristics
(Ta = 25°C)
Characteristic
Drain-source breakdown voltage
Drain cut-off current
Gate leakage current
Gate threshold voltage
Forward transfer admittance
Symbol
Test Conditions
Min
-20
.(Note
4)
-15
⎯
⎯
-0.3
(Note 3)
(Note 3)
(Note 3)
(Note 3)
(Note 3)
2.9
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
(Note 3)
⎯
Typ.
⎯
⎯
⎯
⎯
⎯
5.8
78.5
97.5
120
141
290
44
32
12
46.2
4.7
0.4
1.0
0.9
Max
⎯
⎯
-1
±1
-1.0
⎯
93
123
168
240
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
1.2
V
nC
ns
pF
mΩ
Unit
V
V
μA
μA
V
S
V
(BR) DSS
I
D
= -1 mA, V
GS
= 0 V
V
(BR) DSX
I
D
= -1 mA, V
GS
= 5 V
I
DSS
I
GSS
V
th
⏐Y
fs
⏐
V
DS
= -20 V, V
GS
= 0 V
V
GS
=
±8
V, V
DS
= 0 V
V
DS
= -3 V, I
D
= -1 mA
V
DS
= -3 V, I
D
= -1.0 A
I
D
= -1.5 A, V
GS
= -4.5 V
Drain–source ON-resistance
R
DS (ON)
I
D
= -1.0 A, V
GS
= -2.5 V
I
D
= -0.5 A, V
GS
= -1.8 V
I
D
= -0.25 A, V
GS
= -1.5 V
Input capacitance
Output capacitance
Reverse transfer capacitance
Switching time
Total gate charge
Gate-source charge
Gate-drain charge
Drain-source forward voltage
Turn-on time
Turn-off time
C
iss
C
oss
C
rss
t
on
t
off
Q
g
Q
gs1
Q
gd
V
DSF
V
DS
= -10 V, V
GS
= 0 V
f = 1 MHz
V
DD
= -10 V, I
D
= -0.5 A
V
GS
= 0 to -2.5 V, R
G
= 4.7
Ω
V
DD
= -10 V, I
D
= -2.0 A,
V
GS
= -4.5 V
I
D
= 3.2 A, V
GS
= 0 V
Note 3: Pulse test
Note 4: If a forward bias is applied between gate and source, this device enters V
(BR)DSX
mode. Note that the
drain-source breakdown voltage is lowered in this mode.
Switching Time Test Circuit
(a) Test Circuit
0
OUT
IN
−2.5
V
R
G
R
L
V
DD
10%
(b) V
IN
0V
90%
−
2.5V
10
μs
(c) V
OUT
V
DS (ON)
90%
10%
t
r
t
on
t
off
t
f
V
DD
=
－10
V
R
G
=
4.7
Ω
Duty
≤
1%
V
IN
: t
r
, t
f
<
5 ns
Common Source
Ta
=
25°C
V
DD
Notice on Usage
V
th
can be expressed as the voltage between gate and source when the low operating current value is I
D
= -1 mA for
this product. For normal switching operation, V
GS (on)
requires a higher voltage than V
th
and V
GS (off)
requires a lower
voltage than V
th.
(The relationship can be established as follows: V
GS (off)
< V
th
< V
GS (on).
)
Take this into consideration when using the device.
Handling Precaution
When handling individual devices that are not yet mounted on a circuit board, make sure that the environment is
protected against electrostatic discharge. Operators should wear antistatic clothing, and containers and other objects that
come into direct contact with devices should be made of antistatic materials.
Thermal resistance R
th (ch-a)
and power dissipation P
D
vary depending on board material, board area, board thickness
and pad area. When using this device, please take heat dissipation into consideration
2
2014-03-01
SSM3J134TU
I
D
– V
DS
-8
-4.5 V
-2.5 V
-1.8 V
-6
-1
-10
Common Source
VDS = -3 V
Pulse Test
I
D
– V
GS
(A)
I
D
I
D
-4
VGS = -1.5 V
(A)
Drain current
Drain current
-0.1
Ta = 100 °C
-0.01
25 °C
-0.001
- 25 °C
-2
Common Source
Ta = 25 °C
0
Pulse Test
0
-0.2
-0.4
-0.6
-0.8
-1
-0.0001
0
-1.0
-2.0
Drain–source voltage
V
DS
(V)
Gate–source voltage
V
GS
(V)
R
DS (ON)
– V
GS
300
ID = -1.5 A
Common Source
Pulse Test
300
Common Source
Ta = 25°C
Pulse Test
R
DS (ON)
– I
D
Drain–source ON-resistance
R
DS (ON)
(mΩ)
Drain–source ON-resistance
R
DS (ON)
(mΩ)
-1.5 V
200
-1.8 V
200
25 °C
Ta = 100 °C
-2.5 V
100
VGS = -4.5 V
100
- 25 °C
0
0
-2
-4
-6
-8
0
0
-2.0
-4.0
-6.0
-8.0
Gate–source voltage
V
GS
(V)
Drain current
I
D
(A)
300
R
DS (ON)
– Ta
Common Source
Pulse Test
V
th
– Ta
-1.0
Drain–source ON-resistance
R
DS (ON)
(mΩ)
-1.0 A / -2.5 V
200
-0.5 A / -1.8 V
Gate threshold voltage
V
th
(V)
Common Source
VDS = -3 V
ID = -1 mA
-0.5
-0.25 A / -1.5 V
100
ID = -1.5 A / VGS = -4.5 V
0
−50
0
50
100
150
0
−50
0
50
100
150
Ambient temperature
Ta
(°C)
Ambient temperature
Ta
(°C)
3
2014-03-01
SSM3J134TU
I
DR
– V
DS
10
Common Source
VGS = 0 V
Pulse Test
D
G
I
DR
-25 °C
(S)
10
|Y
fs
| – I
D
Common Source
VDS = -3 V
Ta = 25°C
Pulse Test
⎪Y
fs
⎪
(A)
Drain reverse current
I
DR
1
3
Forward transfer admittance
1
0.1
S
Ta =100 °C
0.01
0.3
25 °C
0.1
-0.01
-0.1
-1
-10
0.001
0
0.5
1.0
1.5
Drain current
I
D
(A)
Drain–source voltage
V
DS
(V)
1000
C – V
DS
10000
t – I
D
Common Source
VDD = -10 V
VGS = 0 to -2.5 V
Ta = 25 °C
RG = 4.7Ω
toff
(pF)
300
C
Capacitance
100
t
(ns)
Ciss
1000
tf
30
Common Source
Ta = 25 °C
f = 1 MHz
VGS = 0 V
-1
-10
Coss
Crss
Switching time
100
10 ton
tr
10
-0.1
-100
1
-0.001
-0.01
-0.1
-1
-10
Drain-source voltage
V
DS
(V)
Drain current
I
D
(A)
Dynamic Input Characteristic
-8
Common Source
ID = -2.0 A
Ta = 25°C
V
GS
Gate–source voltage
(V)
-6
-4
VDD = - 10 V
VDD = - 16 V
-2
0
0
2
4
6
8
10
Total gate charge
Qg
(nC)
4
2014-03-01
SSM3J134TU
Rth
–
t
w
600
1000
b
800
P
D
– T
a
Mounted on FR4 board
(25.4mm
×
25.4mm
×
1.6mm , Cu Pad : 645 mm
2
)
Transient thermal impedance Rth (°C/W)
100
a
Power dissipation P
D
(mW)
600
10
400
1
0.001
Single pulse
a: Mounted on FR4 board
(25.4mm
×
25.4mm
×
1.6mm , Cu Pad : 645 mm
2
)
b: Mounted on FR4 Board
(25.4mm
×
25.4mm
×
1.6mm , Cu Pad : 0.36 mm
2
×3)
200
0.01
0.1
1
10
100
600
0
-40
-20
0
20
40
60
80
100
120 140
160
Pulse Width
t
w
(s)
Ambient temperature
Ta
(°C)
5
2014-03-01
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