BT485AKPJ110 datasheet, PDF - EEWORLD Datasheet

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BT485AKPJ110: DescriptionPalette DAC, 640 X 480 Pixels, CMOS, PQCC84, PLASTIC, LCC-84; CategoryThe embedded processor and controller Microcontrollers and processors; File Size592KB，70 Pages; ManufacturerSynaptics Incorporated

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BT485AKPJ110 Overview

Palette DAC, 640 X 480 Pixels, CMOS, PQCC84, PLASTIC, LCC-84

BT485AKPJ110 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Synaptics Incorporated
package instruction	QCCJ,
Reach Compliance Code	compli
ECCN code	3A001.A.3
Address bus width	4
maximum clock frequency	110 MHz
show configuration	640 X 480 PIXELS
External data bus width	8
JESD-30 code	S-PQCC-J84
length	29.3116 mm
Humidity sensitivity level	1
Number of terminals	84
Maximum operating temperature	70 °C
Minimum operating temperature
Package body material	PLASTIC/EPOXY
encapsulated code	QCCJ
Package shape	SQUARE
Package form	CHIP CARRIER
Peak Reflow Temperature (Celsius)	225
Certification status	Not Qualified
Maximum seat height	4.318 mm
Maximum supply voltage	5.25 V
Minimum supply voltage	4.75 V
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
width	29.3116 mm
uPs/uCs/peripheral integrated circuit type	DISPLAY CONTROLLER, PALETTE DAC

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Bt485A

Distinguishing Features

• 32-Bit Input Pixel Port

• 170, 150, 135, 110 MHz Pipeline

Operation

• Register Compatible with Bt484/485

• 8:1, 4:1, 2:1, 1:1 Multiplexed Pixel

Ports

• 24-Bit True Color 1:1, 4/3:1

• Output Current Accuracy Better

than 5%

• Separate 8-Bit VGA Port

• 2x Clock Multiplier

• Differential Clock Inputs

• 64 x 64 x 2 Programmable Cursor

• Signature Analysis Registers

• Triple 8-Bit D/A Converters

• Three 256 x 8 Color Palette RAMs

• Three 3 x 8 Cursor Color Palettes

• Optional Sync on All Three Channels

• Voltage Reference

Antisparkle Circuitry

Power-Down Mode

VRAM Shift Clock

VGA Support in a True-

Color Window

• 84-Pin PLCC Package

•

170MHz

Monolithic CMOS

True-Color

RAMDAC™

Product Description

The Bt485A RAMDAC is designed speciﬁ-

cally for high-performance, high-resolution

color graphics applications. The wide input

pixel port and internal multiplexing modes

enable TTL-compatible interfacing to the

frame buffer, while maintaining video data

rates required for high refresh rate, high-reso-

lution color graphics. The Bt485A is func-

tionally and software backwards-compatible

to the Bt484 and Bt485.

Included are eight byte-wide pixel input

ports, three 256 x 8 color lookup tables with

triple 8-bit video D/A converters (conﬁg-

urable for either 6-bit or 8-bit D/A converter

operation), and a programmable 64 x 64 x 2

cursor with its own color palette. The Bt485A

may alternately be conﬁgured for a lower per-

formance VGA mode, where 8 bits of VGA

pixel data (from a VGA controller) are input

through a separate VGA pixel port.

Several operational modes are supported

by the 32 pins allocated for the P[0:7] (A–D)

port including 8-bit pseudo color, 16- and 24-

bit true color, and various packed and sparse

pixel formats. The color palette may be

bypassed in any of the true-color modes.

The Bt485A generates RS-343A-compati-

ble video signals into a doubly terminated 75

Ω

load.

Applications

• High-Resolution

Color Graphics

• CAE/CAD/CAM

• Image Processing

• Instrumentation

• Desktop Publishing

Related Products

• Bt484

• Bt485

Functional Block Diagram

Brooktree Corporation • 9868 Scranton Road • San Diego, CA 92121-3707

(619) 452-7580 • (800) 2BT-APPS • FAX: (619) 452-1249 • Internet: apps@brooktree.com

L485A01 Rev. B

Bt485A

Table of Contents

(continued)

List of Figures

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .vi

List of Tables

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .vi

Circuit Description

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

MPU Interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

Reading/Writing Color Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

Additional Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Accessing the Cursor RAM Array. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

6-Bit / 8-Bit Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Power-Down Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Frame Buffer Clocking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Onboard 2x TTL Clock Multiplier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Differential Clock Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Frame Buffer Pixel Port Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Modes of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

4 Bits/Pixel Operation (8:1 MUX) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

8 Bits/Pixel Operation (4:1 and 2:1 MUX) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

16 Bits/Pixel Operation (2:1 and 1:1 MUX) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

24 Bits/Pixel Operation (1:1 MUX) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

24 Bit Packed-Pixel Operation (4/3:1 MUX). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

VGA Port. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Pixel Read Mask Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Cursor Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Cursor Color Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Highlight Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Video Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

SENSE* Output. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Signature Analysis Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Signature Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Data Strobe Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

iii

Bt485A

Table of Contents

(continued)

Internal Registers

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Register Set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Command Register 0 (RS Value = 0110). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Command Register 1 (RS Value = 1000). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Command Register 2 (RS value = 1001) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Command Register 3 (RS Value = 1010, Address = 0X01,

Bit CR07 in Command Register 0 Set to Logical One). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

Command Register 4 (RS Value = 1010, Address = 0X02,

Bit CR07 in Command Register 0 Set to Logical One). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Pixel Read Mask Register (RS Value = 0010) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Status Register (RS Value = 1010). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Red, Green, and Blue Signature Analysis Registers (RS Value = 1010,

Bit CR07 in Command Register 0 Set to Logical One). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Signature Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Data Strobe Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Cursor (x,y) Registers (RS values: CXLR = 1100,

CXHR = 1101, CYLR = 1110, and CYHR = 1111). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Pin Information

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

PC Board Layout

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

PC Board Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

Component Placement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

Ground Planes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

Power Planes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

Device Decoupling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

Power Supply Decoupling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

COMP Decoupling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

VREF Decoupling. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

Digital Signal Interconnect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

TTL Clock Interfacing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

Differential Clock Interfacing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

MPU Control Signal Interfacing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

Analog Signal Interconnect. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

Analog Output Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

Bt485A

Table of Contents

(continued)

Application Information

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

Using Multiple Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

ESD and Latchup Considerations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

Reference Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

Sleep Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

Electrical Specifications

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

Recommended Operating Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

Timing Waveforms

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56

Ordering/Revision History

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60

Ordering Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60

Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60

Package Drawing

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61

84-Pin Plastic J-Lead (PLCC). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61

BT485AKPJ110 Related Products

	BT485AKPJ110
Description	Palette DAC, 640 X 480 Pixels, CMOS, PQCC84, PLASTIC, LCC-84
Is it Rohs certified?	incompatible
Maker	Synaptics Incorporated
package instruction	QCCJ,
Reach Compliance Code	compli
ECCN code	3A001.A.3
Address bus width	4
maximum clock frequency	110 MHz
show configuration	640 X 480 PIXELS
External data bus width	8
JESD-30 code	S-PQCC-J84
length	29.3116 mm
Humidity sensitivity level	1
Number of terminals	84
Maximum operating temperature	70 °C
Package body material	PLASTIC/EPOXY
encapsulated code	QCCJ
Package shape	SQUARE
Package form	CHIP CARRIER
Peak Reflow Temperature (Celsius)	225
Certification status	Not Qualified
Maximum seat height	4.318 mm
Maximum supply voltage	5.25 V
Minimum supply voltage	4.75 V
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
width	29.3116 mm
uPs/uCs/peripheral integrated circuit type	DISPLAY CONTROLLER, PALETTE DAC

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Shortcut: 00 01 02 03 04 05 06 07 08 09 0A 0C 0F 0J 0L 0M 0R 0S 0T 0Z 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 1H 1K 1M 1N 1P 1S 1T 1V 1X 1Z 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 2G 2K 2M 2N 2P 2Q 2R 2S 2T 2W 2Z 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 3G 3H 3J 3K 3L 3M 3N 3P 3R 3S 3T 3V 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4M 4N 4P 4S 4T 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5E 5G 5H 5K 5M 5N 5P 5S 5T 5V 60 61 62 63 64 65 66 67 68 69 6A 6C 6E 6F 6M 6N 6P 6R 6S 6T 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7M 7N 7P 7Q 7V 7W 7X 80 81 82 83 84 85 86 87 88 89 8A 8D 8E 8L 8N 8P 8S 8T 8W 8Y 8Z 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9F 9G 9H 9L 9S 9T 9W

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