EV32C3A3A1-34.368M
Series
RoHS Compliant (Pb-free) 3.3V 6 Pad 5mm x 7mm
Ceramic SMD LVCMOS/TTL VCXO (Tri-State Pad 5)
Operating Temperature Range
0°C to +70°C
Absolute Pull Range
±50ppm Minimum
RoHS
Pb
Nominal Frequency
34.368MHz
EV32C3 A 3 A 1 -34.368M
Duty Cycle
50 ±5(%) Typical, 50 ±10(%) Maximum
Linearity
10% Typical, 20% Maximum
ELECTRICAL SPECIFICATIONS
Nominal Frequency
Frequency Tolerance/Stability
Aging at 25°C
Operating Temperature Range
Supply Voltage
Input Current
Output Voltage Logic High (Voh)
Output Voltage Logic Low (Vol)
Rise/Fall Time
Duty Cycle
Load Drive Capability
Output Logic Type
Absolute Pull Range
34.368MHz
±50ppm Maximum (Inclusive of all conditions: Calibration Tolerance at 25°C, Frequency Stability over the
Operating Temperature Range, Supply Voltage Change, Output Load Change, Shock, and Vibration.)
±2ppm/first year Typical, ±10ppm/10 years Maximum
0°C to +70°C
3.3Vdc ±10%
15mA Maximum
90% of Vdd Minimum (IOH = -4mA)
10% of Vdd Minimum (IOL = +4mA)
5nSec Maximum (Measured at 20% to 80% of Waveform)
50 ±5(%) Typical, 50 ±10(%) Maximum (Measured at 50% of Waveform)
15pF LVCMOS Load Maximum
CMOS
±50ppm Minimum (Inclusive of all conditions: Calibration Tolerance at 25°C, Frequency Stability over the
Operating Temperature Range, Supply Voltage Change, Output Load Change, Shock, Vibration, and Aging
over the Control Voltage (Vc).)
0.3Vdc to 3.0Vdc (Test Condition for APR)
0.0Vdc to Vdd
10% Typical, 20% Maximum
Positive Tranfer Characteristic
10kHz Minimum (Measured at -3dB, Vc = 1.65Vdc)
50kOhms Minimum
10µA Maximum
-70dBc/Hz at offset of 10Hz, -100dBc/Hz at offset of 100Hz, -130dBc/Hz at offset of 1kHz, -147dBc/Hz at
offset of 10kHz, -152dBc/Hz at offset of 100kHz, and -155dBc/Hz at offset of 1MHz (Typical Values at Fo =
27MHz)
+0.9Vdd Minimum to Enable Output; +0.1Vdd Maximum to Disable Output (High Impedance); No Connect
to Enable Output.
1pSec Maximum (Fj = 12kHz to 20MHz)
10mSec Maximum
-55°C to +125°C
Control Voltage
Control Voltage Range
Linearity
Transfer Function
Modulation Bandwidth
Input Impedance
Input Leakage Current
Phase Noise
Tri-State Input Voltage (Vih and Vil)
RMS Phase Jitter
Start Up Time
Storage Temperature Range
ENVIRONMENTAL & MECHANICAL SPECIFICATIONS
ESD Susceptibility
Fine Leak Test
Flammability
Gross Leak Test
Mechanical Shock
Moisture Resistance
Moisture Sensitivity
Resistance to Soldering Heat
Resistance to Solvents
Solderability
Temperature Cycling
MIL-STD-883, Method 3015, Class 1, HBM: 1500V
MIL-STD-883, Method 1014, Condition A
UL94-V0
MIL-STD-883, Method 1014, Condition C
MIL-STD-883, Method 2002, Condition B
MIL-STD-883, Method 1004
J-STD-020, MSL 1
MIL-STD-202, Method 210, Condition K
MIL-STD-202, Method 215
MIL-STD-883, Method 2003
MIL-STD-883, Method 1010, Condition B
www.ecliptek.com | Specification Subject to Change Without Notice | Rev M 2/16/2010 | Page 1 of 6
EV32C3A3A1-34.368M
OUTPUT WAVEFORM
CLOCK OUTPUT
V
OH
80% or 2.4V
DC
50% or 1.4V
DC
20% or 0.4V
DC
V
OL
Fall
Time
Rise
Time
T
W
T
Duty Cycle (%) = T
W
/T x 100
Test Circuit for CMOS Output
Oscilloscope
Frequency
Counter
Current
Meter
Power
Supply
Voltage
Meter
0.01µF
(Note 1)
0.1µF
(Note 1)
Supply
Voltage
(V
DD
)
No
Connect
Tri-State
Voltage
Control
Probe
(Note 2)
Output
Ground
C
L
(Note 3)
Power
Supply
Voltage
Meter
Switch
Note 1: An external 0.1µF low frequency tantalum bypass capacitor in parallel with a
0.01µF high frequency ceramic bypass capacitor close to the package ground
and V
DD
pin is required.
Note 2: A low capacitance (<12pF), 10X attenuation factor, high impedance
(>10Mohms), and high bandwidth (>300MHz) passive probe is recommended.
Note 3: Capacitance value C
L
includes sum of all probe and fixture capacitance.
Power
Supply
www.ecliptek.com | Specification Subject to Change Without Notice | Rev M 2/16/2010 | Page 3 of 6
EV32C3A3A1-34.368M
Test Circuit for TTL Output
Output Load
Drive Capability
10TTL
5TTL
2TTL
10LSTTL
1TTL
R
L
Value
(Ohms)
390
780
1100
2000
2200
C
L
Value
(pF)
15
15
6
15
3
Supply
Voltage No
(V
DD
) Connect
Output
0.01µF
(Note 1)
0.1µF
(Note 1)
Voltage
Control
Power
Supply
Voltage
Meter
Tri-State
Ground
C
L
(Note 3)
Note 5
Power
Supply
Oscilloscope
Frequency
Counter
Table 1: R
L
Resistance Value and C
L
Capacitance
Value Vs. Output Load Drive Capability
Current
Meter
Power
Supply
Voltage
Meter
Probe
(Note 2)
R
L
(Note 4)
Note 1: An external 0.1µF low frequency tantalum bypass capacitor in parallel
with a 0.01µF high frequency ceramic bypass capacitor close to the
package ground and V
DD
pin is required.
Note 2: A low capacitance (<12pF), 10X attenuation factor, high impedance
(>10Mohms), and high bandwidth (>300MHz) passive probe is recommended.
Note 3: Capacitance value C
L
includes sum of all probe and fixture capacitance.
Note 4: Resistance value R
L
is shown in Table 1. See applicable specification sheet for
'Load Drive Capability'.
Note 5: All diodes are MMBD7000, MMBD914, or equivalent.
Power
Supply
www.ecliptek.com | Specification Subject to Change Without Notice | Rev M 2/16/2010 | Page 4 of 6
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