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HCPL-0720-500E

Description
1 CHANNEL LOGIC OUTPUT OPTOCOUPLER, 25 Mbps
CategoryLED optoelectronic/LED    photoelectric   
File Size245KB,18 Pages
ManufacturerAVAGO
Websitehttp://www.avagotech.com/
Environmental Compliance
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HCPL-0720-500E Overview

1 CHANNEL LOGIC OUTPUT OPTOCOUPLER, 25 Mbps

HCPL-0720-500E Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
package instructionROHS COMPLIANT, SURFACE MOUNT, DIP-8
Reach Compliance Codecompli
ECCN codeEAR99
Factory Lead Time17 weeks
Other featuresUL RECOGNIZED, VDE APPROVED
ConfigurationCOMPLEX
Nominal data rate25 MBps
Maximum forward current0.00001 A
Maximum insulation voltage3750 V
JESD-609 codee3
Installation featuresSURFACE MOUNT
Number of components1
Maximum on-state current0.01 A
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Optoelectronic device typesLOGIC IC OUTPUT OPTOCOUPLER
Nominal response time4e-8 ns
Minimum supply voltage4.5 V
Nominal supply voltage5.5 V
surface mountYES
Terminal surfaceMatte Tin (Sn)
Base Number Matches1
HCPL-0720, HCPL-7720, HCPL-0721 and HCPL-7721
40 ns Propagation Delay, CMOS Optocoupler
Data Sheet
Lead (Pb) Free
RoHS 6 fully
compliant
RoHS 6 fully compliant options available;
-xxxE denotes a lead-free product
Description
Available in either an 8-pin DIP or SO-8 package style
respectively, the HCPL-772X or HCPL-072X optocouplers
utilize the latest CMOS IC technology to achieve out-
standing performance with very low power consump-
tion. The HCPL-772X/072X require only two bypass ca-
pacitors for complete CMOS compatability.
Basic building blocks of the HCPL-772X/072X are a CMOS
LED driver IC, a high speed LED and a CMOS detector
IC. A CMOS logic input signal controls the LED driver IC
which supplies current to the LED. The detector IC incor-
porates an integrated photodiode, a high-speed tran-
simpedance amplifier, and a voltage comparator with an
output driver.
Features
+5 V CMOS compatibility
20 ns maximum prop. delay skew
High speed: 25 MBd
40 ns max. prop. delay
10 kV/µs minimum common mode rejection
–40 to 85°C temperature range
Safety and regulatory approvals
UL recognized
– 3750 V
rms
for 1 min. per UL 1577
– 5000 V
rms
for 1 min. per UL 1577
(for HCPL-772X option 020)
CSA component acceptance notice #5
IEC/EN/DIN EN 60747-5-5
– V
IORM
= 630 V
peak
for HCPL-772X option 060
– V
IORM
= 567 V
peak
for HCPL-072X option 060
Functional Diagram
**V
DD1
V
I
1
8
V
DD2
**
NC*
TRUTH TABLE
(POSITIVE LOGIC)
V
I
, INPUT
H
L
LED1
O
2
I
O
LED1
7
fieldbus
OFF
Digital
H
ON
bus, SDS
L
Applications
V , OUTPUT
isolation: CC-Link, DeviceNet, Profi-
*
3
6
V
O
GND
1
4
SHIELD
5
GND
2
AC plasma display panel level shifting
Multiplexed data transmission
Computer peripheral interface
Microprocessor system interface
Pin 3 is the anode of the internal LED and must be left unconnected
for guaranteed data sheet performance. Pin 7 is not connected
internally.
** A 0.1
µF
bypass capacitor must be connected between pins 1 and
4, and 5 and 8.
*
TRUTH TABLE
POSITIVE LOGIC
V
I
H
L
LED1
OFF
ON
V
o
OUTPUT
H
L
CAUTION: It is advised that normal static precautions be taken in handling and assembly
of this component to prevent damage and/or degradation which may be induced by ESD.
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