HYM64V1005GCDL-60 datasheet, PDF

Datasheet> All Categories > storage> storage> HYM64V1005GCDL-60

HYM64V1005GCDL-60: DescriptionEDO DRAM Module, 1MX64, 60ns, CMOS, SODIMM-144; Categorystorage storage; File Size78KB，15 Pages; ManufacturerInfineon; Websitehttp://www.infineon.com/

Download Datasheet Parametric Compare View All

HYM64V1005GCDL-60 Overview

EDO DRAM Module, 1MX64, 60ns, CMOS, SODIMM-144

HYM64V1005GCDL-60 Parametric

Parameter Name	Attribute value
Maker	Infineon
Parts packaging code	SODIMM
package instruction	DIMM, DIMM144,32
Contacts	144
Reach Compliance Code	unknow
ECCN code	EAR99
access mode	FAST PAGE WITH EDO
Maximum access time	60 ns
Other features	RAS ONLY/CAS BEFORE RAS/SELF REFRESH
I/O type	COMMON
JESD-30 code	R-XZMA-N144
memory density	67108864 bi
Memory IC Type	EDO DRAM MODULE
memory width	64
Number of functions	1
Number of ports	1
Number of terminals	144
word count	1048576 words
character code	1000000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	1MX64
Output characteristics	3-STATE
Package body material	UNSPECIFIED
encapsulated code	DIMM
Encapsulate equivalent code	DIMM144,32
Package shape	RECTANGULAR
Package form	MICROELECTRONIC ASSEMBLY
power supply	3.3 V
Certification status	Not Qualified
refresh cycle	1024
Maximum seat height	25.4 mm
self refresh	YES
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	3 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal form	NO LEAD
Terminal pitch	0.8 mm
Terminal location	ZIG-ZAG

Preview

Download Datasheet

View All

3.3V DRAM Modules

144 pin SO-DIMM EDO-DRAM Modules

8MB , 16MB, 32MB & 64MB density

HYM64Vx005GCD(L)-60

•

144 Pin JEDEC Standard, 8 Byte Small Outline Dual In-line Memory Modules with 8 Byte busses

for PC notebook applications

Chip-on Board (COB) Assembly Technique

One bank 1M x 64, 2M x 64, 4M x 64 and 8M x 64 non-parity module organisations

Performance:

-60

tRAC

tCAC

tAA

tRC

tHPC

RAS Access Time

CAS Access Time

Access Time from Address

Cycle Time

EDO Mode Cycle Time

60 ns

15 ns

30 ns

104 ns

25 ns

•

Single +3.3V(± 0.3V ) power supply

CAS-before-RAS refresh, RAS-only-refresh

L-versions use low power DRAMs and support Self Refresh („ leep mode“

)

Decoupling capacitors mounted on substrate

All inputs, outputs are LVTTL compatible

Optional serial presence detect

Gold contact pad

Semiconductor Group

12.97

HYM64V1005GCDL-60 Related Products

	HYM64V1005GCDL-60	HYM64V8005GCDL-60	HYM64V4005GCDL-50	HYM64V8005GCDL-50	HYM64V2005GCDL-60	HYM64V1005GCD-60	HYM64V8005GCD-60	HYM64V1005GCDL-50	HYM64V4005GCDL-60	HYM64V2005GCDL-50
Description	EDO DRAM Module, 1MX64, 60ns, CMOS, SODIMM-144	EDO DRAM Module, 8MX64, 60ns, CMOS, SODIMM-144	EDO DRAM Module, 4MX64, 50ns, CMOS, SODIMM-144	EDO DRAM Module, 8MX64, 50ns, CMOS, SODIMM-144	EDO DRAM Module, 2MX64, 60ns, CMOS, SODIMM-144	EDO DRAM Module, 1MX64, 60ns, CMOS, SODIMM-144	EDO DRAM Module, 8MX64, 60ns, CMOS, SODIMM-144	EDO DRAM Module, 1MX64, 50ns, CMOS, SODIMM-144	EDO DRAM Module, 4MX64, 60ns, CMOS, SODIMM-144	EDO DRAM Module, 2MX64, 50ns, CMOS, SODIMM-144
Parts packaging code	SODIMM	SODIMM	SODIMM	SODIMM	SODIMM	SODIMM	SODIMM	SODIMM	SODIMM	SODIMM
package instruction	DIMM, DIMM144,32	DIMM, DIMM144,32	DIMM,	DIMM,	DIMM, DIMM144,32	DIMM, DIMM144,32	DIMM, DIMM144,32	DIMM,	DIMM, DIMM144,32	DIMM,
Contacts	144	144	144	144	144	144	144	144	144	144
Reach Compliance Code	unknow	unknown	unknown	unknown	unknown	unknown	unknown	unknow	unknow	unknow
ECCN code	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99
access mode	FAST PAGE WITH EDO	FAST PAGE WITH EDO	FAST PAGE WITH EDO	FAST PAGE WITH EDO	FAST PAGE WITH EDO	FAST PAGE WITH EDO	FAST PAGE WITH EDO	FAST PAGE WITH EDO	FAST PAGE WITH EDO	FAST PAGE WITH EDO
Maximum access time	60 ns	60 ns	50 ns	50 ns	60 ns	60 ns	60 ns	50 ns	60 ns	50 ns
Other features	RAS ONLY/CAS BEFORE RAS/SELF REFRESH	RAS ONLY/CAS BEFORE RAS/SELF REFRESH	RAS ONLY/CAS BEFORE RAS/SELF REFRESH	RAS ONLY/CAS BEFORE RAS/SELF REFRESH	RAS ONLY/CAS BEFORE RAS/SELF REFRESH	RAS ONLY/CAS BEFORE RAS REFRESH	RAS ONLY/CAS BEFORE RAS REFRESH	RAS ONLY/CAS BEFORE RAS/SELF REFRESH	RAS ONLY/CAS BEFORE RAS/SELF REFRESH	RAS ONLY/CAS BEFORE RAS/SELF REFRESH
JESD-30 code	R-XZMA-N144	R-XZMA-N144	R-XZMA-N144	R-XZMA-N144	R-XZMA-N144	R-XZMA-N144	R-XZMA-N144	R-XZMA-N144	R-XZMA-N144	R-XZMA-N144
memory density	67108864 bi	536870912 bit	268435456 bit	536870912 bit	134217728 bit	67108864 bit	536870912 bit	67108864 bi	268435456 bi	134217728 bi
Memory IC Type	EDO DRAM MODULE	EDO DRAM MODULE	EDO DRAM MODULE	EDO DRAM MODULE	EDO DRAM MODULE	EDO DRAM MODULE	EDO DRAM MODULE	EDO DRAM MODULE	EDO DRAM MODULE	EDO DRAM MODULE
memory width	64	64	64	64	64	64	64	64	64	64
Number of functions	1	1	1	1	1	1	1	1	1	1
Number of ports	1	1	1	1	1	1	1	1	1	1
Number of terminals	144	144	144	144	144	144	144	144	144	144
word count	1048576 words	8388608 words	4194304 words	8388608 words	2097152 words	1048576 words	8388608 words	1048576 words	4194304 words	2097152 words
character code	1000000	8000000	4000000	8000000	2000000	1000000	8000000	1000000	4000000	2000000
Operating mode	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS
Maximum operating temperature	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C
organize	1MX64	8MX64	4MX64	8MX64	2MX64	1MX64	8MX64	1MX64	4MX64	2MX64
Package body material	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED
encapsulated code	DIMM	DIMM	DIMM	DIMM	DIMM	DIMM	DIMM	DIMM	DIMM	DIMM
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
self refresh	YES	YES	YES	YES	YES	NO	NO	YES	YES	YES
Maximum supply voltage (Vsup)	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V
Minimum supply voltage (Vsup)	3 V	3 V	3 V	3 V	3 V	3 V	3 V	3 V	3 V	3 V
Nominal supply voltage (Vsup)	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
surface mount	NO	NO	NO	NO	NO	NO	NO	NO	NO	NO
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
Terminal form	NO LEAD	NO LEAD	NO LEAD	NO LEAD	NO LEAD	NO LEAD	NO LEAD	NO LEAD	NO LEAD	NO LEAD
Terminal location	ZIG-ZAG	ZIG-ZAG	ZIG-ZAG	ZIG-ZAG	ZIG-ZAG	ZIG-ZAG	ZIG-ZAG	ZIG-ZAG	ZIG-ZAG	ZIG-ZAG
Maker	Infineon	-	-	Infineon	Infineon	Infineon	Infineon	Infineon	Infineon	Infineon
I/O type	COMMON	COMMON	-	-	COMMON	COMMON	COMMON	-	COMMON	-
Output characteristics	3-STATE	3-STATE	-	-	3-STATE	3-STATE	3-STATE	-	3-STATE	-
Encapsulate equivalent code	DIMM144,32	DIMM144,32	-	-	DIMM144,32	DIMM144,32	DIMM144,32	-	DIMM144,32	-
power supply	3.3 V	3.3 V	-	-	3.3 V	3.3 V	3.3 V	-	3.3 V	-
refresh cycle	1024	4096	-	-	2048	1024	4096	-	4096	-
Terminal pitch	0.8 mm	0.8 mm	-	-	0.8 mm	0.8 mm	0.8 mm	-	0.8 mm	-

Recommended Resources

AD7982 differential conversion single-ended signal circuit diagram

6VDC-220VAC inverter circuit diagram

Empty process control circuit diagram

Battery charging prompt circuit diagram

balanced modulator

A very simple ultrasonic mosquito, insect and cockroach repellent circuit

5G Mobile Phone Antenna Design Methodology: How to Achieve Aperture Tuning?: [i=s]This post was last edited by alan000345 on 2020-2-13 11:42[/i]Mobile phone antennas are getting smaller and smaller! However, the screen size is getting bigger and bigger! How to compensate for t...; alan000345 RF/Wirelessly

STM32 drives AD904E, the waveform is abnormal, please help!: AD904E is a parallel 14-bit DAC, that is, analog quantity can be obtained by inputting high and low levels at the IO port. The driving method is: clock low level -> memory access -> load to IO port ->...; NPY stm32/stm8

Smart clock with eight alarms: [color=#000000][font=宋体][size=10.5pt]Ordinary home clocks can only set one alarm time, but many people need to set different alarm times for different time periods such as weekdays, weekends, mornings...; Uxianzhang DIY/Open Source Hardware

[Raspberry Pi Pico Review] 8*8 dot matrix display driver: [i=s]This post was last edited by jinglixixi on 2021-5-14 12:10[/i]LG7088BH is an 8*8 dot matrix module, and its pin arrangement is shown in Figure 1.Figure 1 Pin arrangement relationship PCtoLCD2002 ...; jinglixixi DIY/Open Source Hardware

Interpretation of the solution to LG inverter failure: [color=#808080]Common faults and treatment methods of LG electronic inverters[/color][url=http://www.fszdh.com/][b][color=#800080]LG inverter[/color][/b][/url][color=#808080]Below we explore some of t...; shukongwei Industrial Control Electronics

Help, all the wince6.0 serial ports uart0-uart3 on S3C6410 are used as communication serial ports!: S3C6410 wince6.0 serial port uart0 is used as debug serial port by default. Can serial ports uart0-uart3 all be used as communication serial ports? If so, how should it be modified? Thank you...; tyrone3000 Embedded System

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components