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STB40NF10L

Description
N-CHANNEL 100V - 0.028ohm - 40A D2PAK LOW GATE CHARGE STripFET⑩ POWER MOSFET
CategoryDiscrete semiconductor    The transistor   
File Size318KB,9 Pages
ManufacturerSTMicroelectronics
Websitehttp://www.st.com/
Environmental Compliance
Download Datasheet Download user manual Parametric View All

STB40NF10L Overview

N-CHANNEL 100V - 0.028ohm - 40A D2PAK LOW GATE CHARGE STripFET⑩ POWER MOSFET

STB40NF10L Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
package instructionSMALL OUTLINE, R-PSSO-G2
Contacts3
Reach Compliance Code_compli
ECCN codeEAR99
Is SamacsysN
Avalanche Energy Efficiency Rating (Eas)430 mJ
Shell connectionDRAIN
ConfigurationSINGLE WITH BUILT-IN DIODE
Minimum drain-source breakdown voltage100 V
Maximum drain current (Abs) (ID)40 A
Maximum drain current (ID)40 A
Maximum drain-source on-resistance0.036 Ω
FET technologyMETAL-OXIDE SEMICONDUCTOR
JESD-30 codeR-PSSO-G2
JESD-609 codee3
Humidity sensitivity level1
Number of components1
Number of terminals2
Operating modeENHANCEMENT MODE
Maximum operating temperature175 °C
Package body materialPLASTIC/EPOXY
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)245
Polarity/channel typeN-CHANNEL
Maximum power dissipation(Abs)150 W
Maximum pulsed drain current (IDM)160 A
Certification statusNot Qualified
surface mountYES
Terminal surfaceMatte Tin (Sn)
Terminal formGULL WING
Terminal locationSINGLE
Maximum time at peak reflow temperature30
transistor applicationsSWITCHING
Transistor component materialsSILICON
Base Number Matches1
STB40NF10L
N-CHANNEL 100V - 0.028Ω - 40A D2PAK
LOW GATE CHARGE STripFET™ POWER MOSFET
TYPE
STB40NF10L
s
s
s
s
V
DSS
100 V
R
DS(on)
< 0.033
I
D
40 A
s
TYPICAL R
DS
(on) = 0.028Ω
EXCEPTIONAL dv/dt CAPABILITY
100% AVALANCHE TESTED
APPLICATION ORIENTED
CHARACTERIZATION
ADD SUFFIX “T4” FOR ORDERING IN TAPE &
REEL
3
1
D2PAK
DESCRIPTION
This Power Mosfet series realized with STMicro-
electronics unique STripFET process has specifical-
ly been designed to minimize input capacitance and
gate charge. It is therefore suitable as primary
switch in advanced high-efficiency isolated DC-DC
converters for Telecom and Computer application. It
is also intended for any application with low gate
charge drive requirements.
APPLICATIONS
s
HIGH-EFFICIENCY DC-DC CONVERTERS
s
UPS AND MOTOR CONTROL
s
AUTOMOTIVE
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol
V
DS
V
DGR
V
GS
I
D
I
D
I
DM
(
q
)
P
TOT
E
AS
(1)
T
stg
T
j
Parameter
Drain-source Voltage (V
GS
= 0)
Drain-gate Voltage (R
GS
= 20 kΩ)
Gate- source Voltage
Drain Current (continuos) at T
C
= 25°C
Drain Current (continuos) at T
C
= 100°C
Drain Current (pulsed)
Total Dissipation at T
C
= 25°C
Derating Factor
Single Pulse Avalanche Energy
Storage Temperature
Max. Operating Junction Temperature
Value
100
100
± 15
40
25
160
150
1
430
–65 to 175
175
(1) Starting T
j
= 25°C, I
D
= 20A, V
DD
= 40V
Unit
V
V
V
A
A
A
W
W/°C
mJ
°C
°C
(
q
) Pulse width limited by safe operating area
April 2001
1/9

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