BLC8G20LS-310AV
Power LDMOS transistor
Rev. 2 — 6 May 2015
Product data sheet
1. Product profile
1.1 General description
310 W LDMOS packaged asymmetric Doherty power transistor for base station
applications at frequencies from 1900 MHz to 2000 MHz.
Table 1.
Typical performance
Typical RF performance at T
case
= 25
C in an asymmetrical Doherty production test circuit.
V
DS
= 28 V; I
Dq
= 650 mA (main); V
GS(amp)peak
= 0.5 V, unless otherwise specified.
Test signal
1-carrier W-CDMA
[1]
f
(MHz)
1930 to 1995
V
DS
(V)
28
P
L(AV)
(dBm)
47.5
G
p
(dB)
17
D
(%)
42.5
ACPR
(dBc)
33
[1]
Test signal: 1-carrier W-CDMA; 3GPP test model 1; 64 DPCH; PAR = 9.65 dB at 0.01% probability on
CCDF per carrier.
1.2 Features and benefits
Excellent ruggedness
High-efficiency
Low thermal resistance providing excellent thermal stability
Lower output capacitance for improved performance in Doherty applications
Designed for low memory effects providing excellent digital pre-distortion capability
Internally matched for ease of use
Integrated ESD protection
Compliant to Directive 2002/95/EC, regarding Restriction of Hazardous Substances
(RoHS)
1.3 Applications
RF power amplifiers for base stations and multi carrier applications in the 1900 MHz to
2000 MHz frequency range
NXP Semiconductors
BLC8G20LS-310AV
Power LDMOS transistor
2. Pinning information
Table 2.
Pin
1
2
3
4
5
6
7
[1]
Pinning
Description
drain2 (peak)
drain1 (main)
gate1 (main)
gate2 (peak)
source
video decoupling (peak)
video decoupling (main)
[1]
Simplified outline
Graphic symbol
Connected to flange.
3. Ordering information
Table 3.
Ordering information
Package
Name
BLC8G20LS-310AV
-
Description
air cavity plastic earless flanged package;
6 leads
Version
SOT1258-3
Type number
4. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
DS
V
GS(amp)main
V
GS(amp)peak
T
stg
T
j
[1]
Parameter
drain-source voltage
main amplifier gate-source voltage
peak amplifier gate-source voltage
storage temperature
junction temperature
Conditions
Min
-
0.5
0.5
65
[1]
Max
65
+13
+13
+150
225
Unit
V
V
V
C
C
-
Continuous use at maximum temperature will affect the reliability, for details refer to the on-line MTF
calculator.
5. Thermal characteristics
Table 5.
Symbol
R
th(j-c)
Thermal characteristics
Parameter
thermal resistance from
junction to case
Conditions
V
DS
= 28 V; I
Dq
= 650 mA (main);
V
GS(amp)peak
= 0.5 V; T
case
= 80
C
P
L
= 56 W (CW)
P
L
= 89 W (CW)
0.30
0.30
K/W
K/W
Typ
Unit
BLC8G20LS-310AV
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 2 — 6 May 2015
2 of 15
NXP Semiconductors
BLC8G20LS-310AV
Power LDMOS transistor
6. Characteristics
Table 6.
DC characteristics
T
j
= 25
C unless otherwise specified.
Symbol
V
(BR)DSS
V
GS(th)
V
GSq
I
DSS
I
DSX
I
GSS
g
fs
R
DS(on)
V
(BR)DSS
V
GS(th)
V
GSq
I
DSS
I
DSX
I
GSS
g
fs
R
DS(on)
Parameter
drain-source breakdown voltage
gate-source threshold voltage
gate-source quiescent voltage
drain leakage current
drain cut-off current
gate leakage current
forward transconductance
drain-source on-state resistance
drain-source breakdown voltage
gate-source threshold voltage
gate-source quiescent voltage
drain leakage current
drain cut-off current
gate leakage current
forward transconductance
drain-source on-state resistance
Conditions
V
GS
= 0 V; I
D
= 1.44 mA
V
DS
= 10 V; I
D
= 144 mA
V
DS
= 28 V; I
D
= 650 mA
V
GS
= 0 V; V
DS
= 28 V
V
GS
= V
GS(th)
+ 3.75 V; V
DS
= 10 V
V
GS
= 11 V; V
DS
= 0 V
V
DS
= 10 V; I
D
= 5.04 A
V
GS
= V
GS(th)
+ 3.75 V; I
D
= 5.04 A
V
GS
= 0 V; I
D
= 2.2 mA
V
DS
= 10 V; I
D
= 220 mA
V
DS
= 28 V; I
D
= 1100 mA
V
GS
= 0 V; V
DS
= 28 V
V
GS
= V
GS(th)
+ 3.75 V; V
DS
= 10 V
V
GS
= 11 V; V
DS
= 0 V
V
DS
= 10 V; I
D
= 7.70 A
V
GS
= V
GS(th)
+ 3.75 V; I
D
= 7.7 A
Min
65
1.5
1.7
-
-
-
-
-
65
1.5
1.7
-
-
-
-
-
Typ
-
1.9
2.1
-
28
-
10
100
-
1.9
2.1
-
39
-
15
70
Max
-
2.3
2.5
2.8
-
280
-
166
-
2.3
2.5
2.8
-
280
-
112
Unit
V
V
V
A
A
nA
S
m
V
V
V
A
A
nA
S
m
Main device
Peak device
Table 7.
RF characteristics
Test signal: 1-carrier W-CDMA; PAR = 9.65 dB at 0.01 % probability on the CCDF; 3GPP test model 1; 1 - 64 DPCH;
f
1
= 1932.5 MHz; f
2
= 1992.5 MHz; RF performance at V
DS
= 28 V; I
Dq
= 650 mA (main); V
GS(amp)peak
= 0.5 V; T
case
= 25
C;
unless otherwise specified; in an asymmetrical Doherty production test circuit in 1930 MHz to 1995 MHz.
Symbol
G
p
RL
in
D
ACPR
Parameter
power gain
input return loss
drain efficiency
adjacent channel power ratio
Conditions
P
L(AV)
= 56 W
P
L(AV)
= 56 W
P
L(AV)
= 56 W
P
L(AV)
= 56 W
Min
15.8
-
38
-
Typ
16.9
10
42.5
33
Max
-
6
-
28
Unit
dB
dB
%
dBc
Table 8.
RF characteristics
Test signal: 1-carrier W-CDMA; PAR = 9.65 dB at 0.01 % probability on the CCDF; 3GPP test model 1; 1 - 64 DPCH;
RF performance at V
DS
= 28 V; I
Dq
= 650 mA (main); V
GS(amp)peak
= 0.5 V; T
case
= 25
C; unless otherwise specified; in an
asymmetrical Doherty production test circuit at 1992.5 MHz.
Symbol
PAR
O
P
L(M)
Parameter
output peak-to-average ratio
peak output power
Conditions
P
L(AV)
= 56 W
P
L(AV)
= 56 W
Min
7.0
281
Typ
7.25
300
Max
-
-
Unit
dB
W
BLC8G20LS-310AV
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 2 — 6 May 2015
3 of 15
NXP Semiconductors
BLC8G20LS-310AV
Power LDMOS transistor
7. Test information
7.1 Ruggedness in Doherty operation
The BLC8G20LS-310AV is capable of withstanding a load mismatch corresponding to
VSWR = 10 : 1 through all phases under the following conditions: V
DS
= 28 V;
I
Dq
= 650 mA (main); V
GS(amp)peak
= 0.5 V; f = 1930 MHz. Test signal: 1-carrier WCDMA;
P
L
= 90 W (P
L(M)
=
5
dB); 100 % clipping at 0.01% probability on CCDF.
7.2 Impedance information
Table 9.
Typical impedance of main device
Measured load-pull data of main device; I
Dq
= 700 mA (main); V
DS
= 28 V; pulsed CW (t
p
= 100
s;
= 10 %).
f
(MHz)
1930
1962
1995
1930
1962
1995
[1]
[2]
Z
S
[1]
()
1.3
j3.5
1.4
j3.9
2.1
j3.9
1.3
j3.5
1.4
j3.9
2.1
j3.9
Z
L
[1]
()
1.1
j4.1
1.1
j4.1
1.3
j4.4
1.7
j2.9
1.8
j3.3
1.8
j3.9
P
L
[2]
(W)
169.8
166.3
163.9
116.0
121.2
136.0
D
[2]
(%)
55.6
56.0
57.9
66.4
65.6
64.0
G
p
[2]
(dB)
16.9
17.3
17.9
19.6
19.7
19.4
Maximum power load
Maximum drain efficiency load
Z
S
and Z
L
defined in
Figure 1.
at 3 dB gain compression.
Table 10. Typical impedance of peak device
Measured load-pull data of peak device; I
Dq
= 1200 mA (peak); V
DS
= 28 V; pulsed CW (t
p
= 100
s;
= 10 %).
f
(MHz)
1930
1962
1995
1930
1962
1995
[1]
[2]
Z
S
[1]
()
1.1
j3.9
1.4
j4.1
1.8
j4.5
1.1
j3.9
1.4
j4.1
1.8
j4.5
Z
L
[1]
()
1.4
j4.7
1.4
j4.8
1.4
j5.2
1.7
j2.9
1.7
j2.8
1.7
j3.3
P
L
[2]
(W)
239.9
234.3
229.3
149.8
122.0
147.6
D
[2]
(%)
53.9
53.6
50.2
64.3
61.3
62.9
G
p
[2]
(dB)
16.5
16.9
16.6
19.6
20.3
19.9
Maximum power load
Maximum drain efficiency load
Z
S
and Z
L
defined in
Figure 1.
at 3 dB gain compression.
BLC8G20LS-310AV
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 2 — 6 May 2015
4 of 15
NXP Semiconductors
BLC8G20LS-310AV
Power LDMOS transistor
Fig 1.
Definition of transistor impedance
7.3 Recommended impedances for Doherty design
Table 11. Typical impedance of main device at 1 : 1 load
Measured load-pull data of main device; I
Dq
= 700 mA (main); V
DS
= 28 V; pulsed CW (t
p
= 100
s;
= 10 %).
f
(MHz)
1930
1962
1995
[1]
[2]
[3]
Z
S
[1]
()
0.9
j3.3
0.9
j3.6
1.3
j3.7
Z
L
[1]
()
1.3
j4.8
1.3
j4.6
1.3
j4.5
P
L
[2]
(dBm)
151.7
152.8
162.5
D
[3]
(%)
33.9
35.2
36.2
G
p
[3]
(dB)
19.8
20.2
20.6
Maximum power load
Z
S
and Z
L
defined in
Figure 1.
at 3 dB gain compression.
at P
L(AV)
= 56 W.
Table 12. Typical impedance of main device at 1 : 2.5 load
Measured load-pull data of main device; I
Dq
= 700 mA (main); V
DS
= 28 V; pulsed CW (t
p
= 100
s;
= 10 %).
f
(MHz)
1930
1962
1995
[1]
[2]
[3]
Z
S
[1]
()
1.3
j3.4
1.4
j3.8
1.9
j3.9
Z
L
[1]
()
2.4
j3.5
2.6
j3.5
2.8
j3.6
P
L
[2]
(dBm)
111.2
105.7
100.2
D
[3]
(%)
49.2
50.4
50.2
G
p
[3]
(dB)
22.5
22.9
23.0
Maximum power load
Z
S
and Z
L
defined in
Figure 1.
at 3 dB gain compression.
at P
L(AV)
= 56 W.
BLC8G20LS-310AV
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 2 — 6 May 2015
5 of 15
京公网安备 11010802033920号
EEWORLD
