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PI6C485311_06

Description
3.3V Low Skew 1-to-2 Differential to LVPECL Fanout Buffer
File Size362KB,6 Pages
ManufacturerPericom Semiconductor Corporation (Diodes Incorporated)
Websitehttps://www.diodes.com/
Download Datasheet View All

PI6C485311_06 Overview

3.3V Low Skew 1-to-2 Differential to LVPECL Fanout Buffer

PI6C485311
3.3V Low Skew 1-to-2
Differential to LVPECL Fanout Buffer
Features
Pin-to-pin compatible to ICS85311
Maximum operation frequency: 800MHz
2 pair of differential LVPECL outputs
CLK,
n
CLK pair accepts LVDS, LVPECL, LVHSTL,
SSTL and HCSL input level
Output Skew: 100ps (maximum)
Part-to-part skew: 150ps (maximum)
Propagation delay: 2ns (maximum)
3.3V power supply
Operating Temperature: -40
o
C to 85
o
C
Packaging (Pb-free & Green avaliable):
-
8-pin SOIC (W)
Description
The PI6C485311 is a high-performance low-skew LVPECL fanout
buffer. PI6C485311 features two selectable differential inputs and
translates to four LVPECL ultra-low jitter outputs. The inputs
can also be configured to single-ended with external resistor bias
circuit. The CLK input accepts LPECL or LVDS or LVHSTL or
SSTL or HCSL signals, and PCLK input accepts LVPECL or SSTL
or CML signals. PI6C485311 is ideal for differential to LVPECL
translations and/or LVPECL clock distribution. Typical clock
translation and distribution applications are data-communications
and telecommunications.
Block Diagram
Q
0
n
Q
0
Q
1
n
Q
1
Pin Diagram
1
2
3
4
Q0
nQ0
Q1
nQ1
8
7
6
5
V
CC
CLK
nCLK
V
EE
CLK
n
CLK
06-0283
1
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