IRFZ34S, IRFZ34L, SiHFZ34S, SiHFZ34L
Vishay Siliconix
Power MOSFET
PRODUCT SUMMARY
V
DS
(V)
R
DS(on)
(Ω)
Q
g
(Max.) (nC)
Q
gs
(nC)
Q
gd
(nC)
Configuration
V
GS
= 10 V
46
11
22
Single
60
0.050
FEATURES
•
•
•
•
•
•
Advanced Process Technology
Surface Mount
Low-Profile Through-Hole (IRFZ34L/SiHFZ34L)
175 °C Operating Temperature
Fast Switching
Lead (Pb)-free Available
Available
RoHS*
COMPLIANT
DESCRIPTION
D
I
2
PAK
(TO-262)
D
2
PAK (TO-263)
G
D
S
G
S
N-Channel MOSFET
Third generation Power MOSFETs from Vishay utilize
advanced processing techniques to achieve extremely low
on-resistance per silicon area. This benefit, combined with
the fast switching speed and ruggedized device design that
Power MOSFETs are well known for, provides the designer
with an extremely efficient and reliable device for use in a
wide variety of applications.
The D
2
PAKis a surface mount power package capable of
accommodating die sizes up to HEX-4. It provides the
highest power capability and the lowest possible
on-resistance in any existing surface mount package. The
D
2
PAK is suitable for high current applications because of its
low internal connection resistance and can dissipate up to 2
W in a typical surface mount application.
The through-hole version (IRFZ34L/SiHFZ34L) is available
for low-profile applications.
ORDERING INFORMATION
Package
Lead (Pb)-free
SnPb
Note
a. See device orientation.
D
2
PAK (TO-263)
IRFZ34SPbF
SiHFZ34S-E3
IRFZ34S
SiHFZ34S
D
2
PAK (TO-263)
IRFZ34STRRPbF
a
SiHFZ34STRPbF
a
IRFZ34STRR
a
SiHFZ34STR
a
D
2
PAK (TO-263)
IRFZ34STRLPbF
a
SiHFZ34STLPbF
a
IRFZ34STRL
a
SiHFZ34STL
a
I
2
PAK (TO-263)
IRFZ34LPbF
SiHFZ34L-E3
IRFZ34L
SiHFZ34L
ABSOLUTE MAXIMUM RATINGS
T
C
= 25 °C, unless otherwise noted
PARAMETER
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
Pulsed Drain
Linear Derating Factor
Single Pulse Avalanche Energy
b, e
Maximum Power Dissipation
T
C
= 25 °C
T
A
= 25 °C
Current
a, e
V
GS
at 10 V
T
C
= 25 °C
T
C
= 100 °C
SYMBOL
V
DS
V
GS
I
D
I
DM
E
AS
P
D
LIMIT
60
± 20
30
21
120
0.59
200
88
3.7
4.5
- 55 to + 175
300
d
UNIT
V
A
W/°C
mJ
W
V/ns
°C
dV/dt
Peak Diode Recovery dV/dt
c, e
Operating Junction and Storage Temperature Range
T
J
, T
stg
Soldering Recommendations (Peak Temperature)
for 10 s
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. V
DD
= 25 V, Starting T
J
= 25 °C, L = 260 µH, R
G
= 25
Ω,
I
AS
= 30 A (see fig. 12).
c. I
SD
≤
30 A, dI/dt
≤
200 A/µs, V
DD
≤
V
DS
, T
J
≤
175 °C.
d. 1.6 mm from case.
e. Uses IRFZ34/SiHFZ34 data and test conditions.
* Pb containing terminations are not RoHS compliant, exemptions may apply
Document Number: 90368
S-Pending-Rev. A, 22-Jul-08
WORK-IN-PROGRESS
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1
IRFZ34S, IRFZ34L, SiHFZ34S, SiHFZ34L
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
Maximum Junction-to-Ambient
(PCB Mount)
a
Maximum Junction-to-Case (Drain)
SYMBOL
R
thJA
R
thJC
TYP.
-
-
MAX.
40
1.7
UNIT
°C / W
Note
a. When mounted on 1" square PCB (FR-4 or G-10 material).
SPECIFICATIONS
T
J
= 25 °C, unless otherwise noted
PARAMETER
Static
Drain-Source Breakdown Voltage
V
DS
Temperature Coefficient
Gate-Source Threshold Voltage
Gate-Source Leakage
Zero Gate Voltage Drain Current
Drain-Source On-State Resistance
Forward Transconductance
Dynamic
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Internal Source Inductance
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
Pulsed Diode Forward Current
a
Body Diode Voltage
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
Forward Turn-On Time
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
V
DS
ΔV
DS
/T
J
V
GS(th)
I
GSS
I
DSS
R
DS(on)
g
fs
V
GS
= 0 V, I
D
= 250 µA
Reference to 25 °C, I
D
= 1 mA
c
V
DS
= V
GS
, I
D
= 250 µA
V
GS
= ± 20 V
V
DS
= 60 V, V
GS
= 0 V
V
DS
= 48 V, V
GS
= 0 V, T
J
= 150 °C
V
GS
= 10 V
I
D
= 18 A
b
V
DS
= 25 V, I
D
= 18 A
b
60
-
2.0
-
-
-
-
9.3
-
0.065
-
-
-
-
-
-
-
-
4.0
± 100
25
250
0.05
-
V
V/°C
V
nA
µA
Ω
S
C
iss
C
oss
C
rss
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
S
V
GS
= 0 V,
V
DS
= 25 V,
f = 1.0 MHz, see fig. 5
c
-
-
-
-
1200
600
100
-
-
-
13
100
29
52
7.5
-
-
-
46
11
22
-
-
-
-
-
nH
ns
nC
pF
V
GS
= 10 V
I
D
= 30 A, V
DS
= 48 V,
see fig. 6 and 13
b, c
-
-
-
V
DD
= 30 V, I
D
= 30 A,
R
G
= 12
Ω,
R
D
= 1.0
Ω,
see fig. 10
b, c
-
-
-
Between lead, and center of die contact
-
-
-
-
-
-
-
-
-
120
700
30
A
120
1.6
230
1400
V
ns
µC
G
S
T
J
= 25 °C, I
S
= 30 A, V
GS
= 0 V
b
T
J
= 25 °C, I
F
= 30 A, dI/dt = 100 A/µs
b, c
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
and L
D
)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width
≤
300 µs; duty cycle
≤
2 %.
c. Uses IrFZ34/SiHFZ34 data and test conditions.
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Document Number: 90368
S-Pending-Rev. A, 22-Jul-08
IRFZ34S, IRFZ34L, SiHFZ34S, SiHFZ34L
Vishay Siliconix
TYPICAL CHARACTERISTICS
25 °C, unless otherwise noted
Fig. 1 - Typical Output Characteristics
Fig. 3 - Typical Transfer Characteristics
Fig. 2 - Typical Output Characteristics
Fig. 4 - Normalized On-Resistance vs. Temperature
Document Number: 90368
S-Pending-Rev. A, 22-Jul-08
www.vishay.com
3
IRFZ34S, IRFZ34L, SiHFZ34S, SiHFZ34L
Vishay Siliconix
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
Fig. 7 - Typical Source-Drain Diode Forward Voltage
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
Fig. 8 - Maximum Safe Operating Area
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Document Number: 90368
S-Pending-Rev. A, 22-Jul-08
IRFZ34S, IRFZ34L, SiHFZ34S, SiHFZ34L
Vishay Siliconix
R
D
V
DS
V
GS
R
G
D.U.T.
+
- V
DD
10 V
Pulse width
≤
1 µs
Duty factor
≤
0.1 %
Fig. 10a - Switching Time Test Circuit
V
DS
90 %
10 %
V
GS
t
d(on)
t
r
t
d(off)
t
f
Fig. 9 - Maximum Drain Current vs. Case Temperature
Fig. 10b - Switching Time Waveforms
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
L
Vary t
p
to obtain
required I
AS
R
G
V
DS
t
p
V
DD
D.U.T.
I
AS
10 V
t
p
0.01
Ω
I
AS
+
-
V
DD
V
DS
V
DS
Fig. 12a - Unclamped Inductive Test Circuit
Document Number: 90368
S-Pending-Rev. A, 22-Jul-08
Fig. 12b - Unclamped Inductive Waveforms
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