IS61WV51232ALL/ALS
IS61WV51232BLL/BLS
IS64WV51232BLL/BLS
512K x 32 HIGH-SPEED ASYNCHRONOUS
CMOS STATIC RAM WITH 3.3V SUPPLY
FEATURES
• High-speed access times:
8, 10, 20 ns
• High-performance, low-power CMOS process
• Multiple center power and ground pins for greater
noise immunity
• Easy memory expansion with CE
and
OE
options
•
CE
power-down
• Fully static operation: no clock or refresh
required
• TTL compatible inputs and outputs
• Single power supply
V
dd
1.65V to 2.2V (IS61WV51232Axx)
speed = 20ns for V
dd
1.65V to 2.2V
V
dd
2.4V to 3.6V (IS61/64WV51232Bxx)
speed = 10ns for V
dd
2.4V to 3.6V
speed = 8ns for V
dd
3.3V + 5%
• Packages available:
– 90-ball miniBGA (8mm x 13mm)
• Industrial and Automotive Temperature Support
• Lead-free available
JUNE 2016
high-speed, 16M-bit static RAMs organized as 512K words
by 32 bits. It is fabricated using
ISSI
's high-performance
CMOS technology. This highly reliable process coupled
with innovative circuit design techniques, yields high-
performance and low power consumption devices.
When
CE
is HIGH (deselected), the device assumes a
standby mode at which the power dissipation can be re-
duced down with CMOS input levels.
Easy memory expansion is provided by using Chip Enable
and Output Enable inputs, CE
and
OE. The active LOW
Write Enable (WE)
controls both writing and reading of
the memory.
The device is packaged in the JEDEC standard 90-ball
BGA (8mm x 13mm).
DESCRIPTION
The
ISSI
IS61WV51232Axx/Bxx and IS64WV51232Bxx are
FUNCTIONAL BLOCK DIAGRAM
512K x 32
MEMORY ARRAY
A0-A18
DECODER
VDD
VSS
DQa-d
I/O
DATA
CIRCUIT
COLUMN I/O
CE
OE
WE
BWa-d
CE2
CONTROL
CIRCUIT
Copyright © 2016 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without
notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest
version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reason-
ably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications
unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that:
a.) the risk of injury or damage has been minimized;
b.) the user assume all such risks; and
c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances
Integrated Silicon Solution, Inc. — www.issi.com
Rev. A
06/01/2016
1
IS61WV51232ALL/ALS
IS61WV51232BLL/BLS
IS64WV51232BLL/BLS
TRUTH TABLE
CE
H
X
L
L
L
L
L
L
L
L
L
L
L
CE2
X
L
H
H
H
H
H
H
H
H
H
H
H
OE
X
X
L
L
L
L
L
X
X
X
X
X
H
WE BWa BWb BWc BWd
X
X
H
H
H
H
H
L
L
L
L
L
H
X
X
L
L
H
H
H
L
L
H
H
H
X
X
X
L
H
L
H
H
L
H
L
H
H
X
X
X
L
H
H
L
H
L
H
H
L
H
X
X
X
L
H
H
H
L
L
H
H
H
L
X
DQ
0-7
High-Z
High-Z
DQ
8-15
High-Z
High-Z
DQ
16-23
High-Z
High-Z
High-Z
High-Z
Data Out
High-Z
Data In
High-Z
High-Z
Data In
High-Z
High-Z
DQ
24-31
High-Z
High-Z
High-Z
High-Z
High-Z
Mode
Power Down
Power Down
Read Byte a
Bits Only
Read Byte b
Bits Only
Read Byte c
Bits Only
Power
(I
sb
)
(I
sb
)
(I
CC
)
(I
CC
)
(I
CC
)
(I
CC
)
(I
CC
)
(I
CC
)
(I
CC
)
(I
CC
)
(I
CC
)
(I
CC
)
(I
CC
)
Data Out Data Out Data Out Data Out Read All Bits
Data Out High-Z
High-Z Data Out
High-Z
High-Z
High-Z
High-Z
Data Out Read Byte d
Bits Only
Data In
High-Z
High-Z
High-Z
Data In
High-Z
Write All Bits
Write Byte a
Bits Only
Write Byte b
Bits Only
Write Byte c
Bits Only
Write Byte d
Bits Only
Selected,
Outputs
Disabled
Data In Data In
Data In High-Z
High-Z
High-Z
High-Z
High-Z
Data In
High-Z
High-Z
High-Z
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
term
V
dd
t
stg
P
t
Parameter
Terminal Voltage with Respect to GND
V
dd
Relates to GND
Storage Temperature
Power Dissipation
Value
–0.5 to V
dd
+ 0.5
–0.3 to 4.0
–65 to +150
1.0
Unit
V
V
°C
W
Notes:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to
the device. This is a stress rating only and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect reliability.
CAPACITANCE
(1,2)
Symbol
C
in
C
i/O
Parameter
Input Capacitance
Input/Output Capacitance
Conditions
V
in
= 0V
V
Out
= 0V
Max.
6
8
Unit
pF
pF
Notes:
1. Tested initially and after any design or process changes that may affect these parameters.
2. Test conditions: T
a
= 25°C,
f = 1 MHz, V
dd
= 3.3V.
Integrated Silicon Solution, Inc. — www.issi.com
Rev. A
06/01/2016
3
IS61WV51232ALL/ALS
IS61WV51232BLL/BLS
IS64WV51232BLL/BLS
DC ELECTRICAL CHARACTERISTICS
(Over Operating Range)
V
DD
= 3.3V + 5%
Symbol
V
Oh
V
Ol
V
ih
V
il
i
li
i
lO
Parameter
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
(1)
Input Leakage
Output Leakage
Test Conditions
V
dd
=
Min., i
Oh
=
–4.0 mA
V
dd
=
Min., i
Ol
=
8.0 mA
GND ≤
V
in
≤
V
dd
GND ≤
V
Out
≤
V
dd
,
Outputs Disabled
Min.
2.4
—
2
–0.3
–1
–1
Max.
—
0.4
V
dd
+ 0.3
0.8
1
1
Unit
V
V
V
V
µA
µA
Note:
1.
V
il
(min.) = –0.3V DC; V
il
(min.) = –2.0V AC (pulse width 2.0 ns). Not 100% tested.
V
ih
(max.) = V
dd
+
0.3V dC; V
ih
(max.) = V
dd
+
2.0V aC
(pulse width 2.0 ns). Not 100% tested.
DC ELECTRICAL CHARACTERISTICS
(Over Operating Range)
V
DD
= 2.4V-3.6V
Symbol
V
Oh
V
Ol
V
ih
V
il
i
li
i
lO
Parameter
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
(1)
Input Leakage
Output Leakage
Test Conditions
V
dd
=
Min., i
Oh
=
–1.0 mA
V
dd
=
Min., i
Ol
=
1.0 mA
GND ≤
V
in
≤
V
dd
GND ≤
V
Out
≤
V
dd
,
Outputs Disabled
Min.
1.8
—
2.0
–0.3
–1
–1
Max.
—
0.4
V
dd
+ 0.3
0.8
1
1
Unit
V
V
V
V
µA
µA
Note:
1.
V
il
(min.) = –0.3V DC; V
il
(min.) = –2.0V AC (pulse width 2.0 ns). Not 100% tested.
V
ih
(max.) = V
dd
+
0.3V dC; V
ih
(max.) = V
dd
+
2.0V aC
(pulse width 2.0 ns). Not 100% tested.
DC ELECTRICAL CHARACTERISTICS
(Over Operating Range)
V
DD
= 1.65V-2.2V
Symbol
V
Oh
V
Ol
V
ih
V
il
(1)
i
li
i
lO
Parameter
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
Input Leakage
Output Leakage
Test Conditions
i
Oh
=
-0.1 mA
i
Ol
=
0.1 mA
V
DD
1.65-2.2V
1.65-2.2V
1.65-2.2V
1.65-2.2V
Min.
1.4
—
1.4
–0.2
–1
–1
Max.
—
0.2
V
dd
+ 0.2
0.4
1
1
Unit
V
V
V
V
µA
µA
GND ≤
V
in
≤
V
dd
GND ≤
V
Out
≤
V
dd
,
Outputs Disabled
Notes:
1.
V
il
(min.) = –0.3V dC; V
il
(min.) = –2.0V
AC (pulse width -2.0ns). Not 100% tested.
V
ih
(max.) = V
dd
+ 0.3V dC; V
ih
(max.) = V
dd
+
2.0V AC (pulse width -2.0ns). Not 100% tested.
4
Integrated Silicon Solution, Inc. — www.issi.com
Rev. A
06/01/2016
IS61WV51232ALL/ALS
IS61WV51232BLL/BLS
IS64WV51232BLL/BLS
HIGH SPEED
OPERATING RANGE (V
DD
) (IS61WV51232ALL)
Range
Ambient Temperature
Commercial
0°C to +70°C
Industrial
–40°C to +85°C
Automotive
–40°C to +125°C
V
DD
1.65V-2.2V
1.65V-2.2V
1.65V-2.2V
Speed
20ns
20ns
20ns
OPERATING RANGE (V
DD
) (IS61WV51232BLL)
(1)
Range
Ambient Temperature
Commercial
0°C to +70°C
Industrial
–40°C to +85°C
V
DD
(8
n
S
)
1
3.3V +
5%
3.3V +
5%
V
DD
(10
n
S
)
1
2.4V-3.6V
2.4V-3.6V
Note:
1. When operated in the range of 2.4V-3.6V, the device meets 10ns. When operated in the range of 3.3V + 5%,
the device meets 8ns.
OPERATING RANGE (V
DD
) (IS64WV51232BLL)
Range
Ambient Temperature
Automotive
–40°C to +125°C
V
DD
(10
n
S
)
2.4V-3.6V
POWER SUPPLY CHARACTERISTICS
(1)
(Over Operating Range)
-8
Symbol
i
CC
Parameter
Test Conditions
V
dd
Dynamic Operating
V
dd
=
Max.,
Supply Current
i
Out
= 0
mA, f = f
max
Com.
Ind.
Auto.
typ.
(2)
Com.
Ind.
Auto.
Com.
Ind.
Auto.
Com.
Ind.
Auto.
typ.
(2)
Min.
—
—
—
—
—
—
—
—
—
—
—
—
Max.
110
115
—
85
90
—
30
35
—
20
25
—
-10
Min. Max.
—
90
—
95
—
140
60
—
85
—
90
—
110
—
30
—
35
—
70
—
20
—
25
—
60
4
-20
Min. Max.
—
50
—
60
—
100
—
—
—
—
—
—
—
—
—
45
55
90
30
35
70
20
25
60
Unit
mA
i
CC
1
Operating
Supply Current
TTL Standby Current
(TTL Inputs)
CMOS Standby
Current (CMOS Inputs)
V
dd
=
Max.,
i
Out
= 0
mA, f = 0
V
dd
=
Max.,
V
in
= V
ih
or
V
il
CE
≥
V
ih
, f = 0
V
dd
=
Max.,
CE
≥
V
dd
– 0.2V,
V
in
≥
V
dd
– 0.2V,
or
V
in
≤
0.2V,
f = 0
mA
i
sb
1
i
sb
2
mA
mA
Note:
1. At f = f
max
, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
2. Typical values are measured at V
dd
= 3.0V, T
a
= 25
o
C and not 100% tested.
Integrated Silicon Solution, Inc. — www.issi.com
Rev. A
06/01/2016
5
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