LP3982ILD-AJD datasheet, PDF - EEWORLD Datasheet

LP3982ILD-AJD: Description3 V FIXED POSITIVE LDO REGULATOR, 0.22 V DROPOUT, PDSO8; Categorysemiconductor Power management; File Size352KB，12 Pages; ManufacturerNational Semiconductor（TI ）; Websitehttp://www.ti.com

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LP3982ILD-AJD Overview

3 V FIXED POSITIVE LDO REGULATOR, 0.22 V DROPOUT, PDSO8

Parameter Name	Attribute value
Number of functions	1
Number of terminals	8
Maximum output current	0.3000 A
Maximum output voltage	3.09 V
Minimum output voltage	2.91 V
Maximum input voltage	6 V
Minimum input voltage	2.5 V
Processing package description	LLP-8
state	ACTIVE
Craftsmanship	CMOS
packaging shape	RECTANGULAR
Package Size	SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE
surface mount	Yes
Terminal form	NO LEAD
Terminal spacing	0.5000 mm
terminal coating	TIN LEAD
Terminal location	DUAL
Packaging Materials	PLASTIC/EPOXY
Maximum voltage difference	0.2200 V
Adjustment type	FIXED POSITIVE LDO REGULATOR
Rated output voltage	3 V

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