LP3986TL-3333 datasheet, PDF - EEWORLD Datasheet

LP3986TL-3333: DescriptionDual Micropower 150 mA Ultra Low-Dropout CMOS Voltage Regulators in micro SMD Package; CategoryPower/power management The power supply circuit; File Size317KB，13 Pages; ManufacturerNational Semiconductor（TI ）; Websitehttp://www.ti.com

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LP3986TL-3333 Overview

Dual Micropower 150 mA Ultra Low-Dropout CMOS Voltage Regulators in micro SMD Package

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	National Semiconductor（TI ）
package instruction	0.600 MM HEIGHT, MICRO, BUMP, SMD-8
Reach Compliance Code	_compli
ECCN code	EAR99
Is Samacsys	N
Adjustability	FIXED
Maximum drop-back voltage 1	0.1 V
Nominal dropback voltage 1	0.06 V
Maximum drop-back voltage 2	0.1 V
Maximum absolute input voltage	6.5 V
Maximum input voltage	6 V
Minimum input voltage	2.7 V
JESD-30 code	S-PBGA-B8
JESD-609 code	e0
length	1.55 mm
Maximum grid adjustment rate	0.0093%
Maximum load regulation	0.049%
Humidity sensitivity level	1
Number of functions	1
Output times	2
Number of terminals	8
Working temperatureTJ-Max	125 °C
Operating temperatureTJ-Mi	-40 °C
Maximum output current 1	0.15 A
Maximum output current 2	0.15 A
Maximum output voltage 1	3.399 V
Minimum output voltage 1	3.201 V
Nominal output voltage 1	3.3 V
Maximum output voltage 2	3.399 V
Minimum output voltage 2	3.201 V
Nominal output voltage 2	3.3 V
Package body material	PLASTIC/EPOXY
encapsulated code	VFBGA
Encapsulate equivalent code	BGA8,3X3,20
Package shape	SQUARE
Package form	GRID ARRAY, VERY THIN PROFILE, FINE PITCH
method of packing	TAPE AND REEL
Peak Reflow Temperature (Celsius)	260
Certification status	Not Qualified
Regulator type	FIXED POSITIVE MULTIPLE OUTPUT LDO REGULATOR
Maximum seat height	0.6 mm
surface mount	YES
technology	CMOS
Terminal surface	Tin/Lead (Sn63Pb37)
Terminal form	BALL
Terminal pitch	0.5 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	40
Maximum voltage tolerance	3%
width	1.55 mm
Base Number Matches	1

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