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LPC1820

Description
32-bit ARM Cortex-M3 MCU; up to 200 kB SRAM; Ethernet, two High-speed USB, LCD, and external memory controller
File Size2MB,157 Pages
ManufacturerPhilips Semiconductors (NXP Semiconductors N.V.)
Websitehttps://www.nxp.com/
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LPC1820 Overview

32-bit ARM Cortex-M3 MCU; up to 200 kB SRAM; Ethernet, two High-speed USB, LCD, and external memory controller

LPC1850/30/20/10
32-bit ARM Cortex-M3 MCU; up to 200 kB SRAM; Ethernet,
two High-speed USB, LCD, and external memory controller
Rev. 3 — 6 December 2011
Preliminary data sheet
1. General description
The LPC1850/30/20/10 are ARM Cortex-M3 based microcontrollers for embedded
applications. The ARM Cortex-M3 is a next generation core that offers system
enhancements such as low power consumption, enhanced debug features, and a high
level of support block integration.
The LPC1850/30/20/10 operate at CPU frequencies of up to 180 MHz. The ARM
Cortex-M3 CPU incorporates a 3-stage pipeline and uses a Harvard architecture with
separate local instruction and data buses as well as a third bus for peripherals. The ARM
Cortex-M3 CPU also includes an internal prefetch unit that supports speculative
branching.
The LPC1850/30/20/10 include up to 200 kB of on-chip SRAM, a quad SPI Flash
Interface (SPIFI), a State Configurable Timer (SCT) subsystem, two High-speed USB
controllers, Ethernet, LCD, an external memory controller, and multiple digital and analog
peripherals.
Remark:
This data sheet describes the Rev ‘-’ and the Rev ‘A’ versions of parts
LPC1850/30/20/10.
2. Features and benefits
Processor core
ARM Cortex-M3 processor, running at frequencies of up to 180 MHz.
ARM Cortex-M3 built-in Memory Protection Unit (MPU) supporting eight regions.
ARM Cortex-M3 built-in Nested Vectored Interrupt Controller (NVIC).
Non-maskable Interrupt (NMI) input.
JTAG and Serial Wire Debug, serial trace, eight breakpoints, and four watch points.
Enhanced Trace Module (ETM) and Enhanced Trace Buffer (ETB) support.
System tick timer.
On-chip memory
200 kB SRAM for code and data use.
Multiple SRAM blocks with separate bus access.
64 kB ROM containing boot code and on-chip software drivers.
128 bit One-Time Programmable (OTP) memory for general-purpose use.
Clock generation unit
Crystal oscillator with an operating range of 1 MHz to 25 MHz.
12 MHz internal RC oscillator trimmed to 1 % accuracy over temperature and
voltage.

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