ML6652
10/100Mbps Ethernet Fiber and Copper
Media Converter with Auto-Negotiation
GENERAL DESCRIPTION
The ML6652 is a low cost multi-function / multi-standard
single chip Media Converter that provides 10Mbps and
100Mbps signal conversion between twisted pair and fiber
optic Ethernet technologies. The device supports
conversion between:
10BASE-T and 10BASE-FL
100BASE-TX and 100BASE-FX/SX
100BASE-FX and 100BASE-SX
FLP Bursts and FLNP Bursts
The device supports 10Mbps and 100Mbps operating data
rates with Auto-Negotiation using 850nm or 1300nm
optics. One or both of the fiber optic and twisted pair
interfaces can be interfaced to industry standard miniature
fiber optic components or Physical Media Dependent
(PMD) modules using Positive Emitter Coupled Logic/Low
Voltage Positive Emitter Coupled Logic (PECL/LVPECL)
compatible modes. Support of other wavelengths is
possible using the PECL/LVPECL interface.
FEATURES
•
Complete implementation of fiber optic and twisted pair
media interface
•
Supports ISO/IEC 8802.3, IEEE 802.3 and TIA/EIA-785
Industry Standards, including full Auto-Negotiation for
twisted pair and fiber optic media
•
850nm, 1300nm miniature fiber optic components and
PMD modules
•
Supports 1:1 receiver/transmitter transformer ratio for
twisted pair
•
Low latency
•
Integrated voltage and current references
•
Integrated twisted pair output wave shaping eliminates
external filtering
•
Integrated twisted pair 10BASE-T input filter and
100BASE-TX equalizer with baseline wander correction
circuit
•
Serial Management Interface
•
Full and Half Duplex with Auto-Negotiation
• Integrated LED Driver
•
Integrated Data Quantizer
•
Small 44-Pin TQFP and LPCC/QFN
•
Low 3.3V power supply
•
Integrated Link Integrity Warning (LIW)
APPLICATIONS
•
Single/Multi Port 10/100 Auto-Negotiating Media
Converters
•
Single/Multi Port 100BASE-FX/SX to100BASE-TX
Media Converters
•
Single/Multi Port 10BASE-FL to 10BASE-T Media
Converters
•
Single/Multi Mode Fiber Converters
•
Fiber Optic Front-End for Network Interface Cards
(NICs), Repeaters, Bridges, Hubs and Switches
•
Fiber-To-The-Desk/Building/Factory Floor as well as
Home Connectivity Gateway/Demarcation Products
•
Redundant Link Converters and Wavelength Converters
January 2004
Final Datasheet
DS6652-F-02
ML6652
TABLE OF CONTENTS
General Description ......................................................................................................................................................... 1
Features ......................................................................................................................................................................... 1
Applications ..................................................................................................................................................................... 1
Warranty Information ....................................................................................................................................................... 2
Block Diagram ................................................................................................................................................................. 3
Pin Configuration ............................................................................................................................................................. 4
Pin Descriptions ............................................................................................................................................................... 4
General Description ....................................................................................................................................................... 13
Functional Description ................................................................................................................................................... 14
Device Configuration ..................................................................................................................................................... 14
Default Power Configuration .......................................................................................................................................... 14
Serial Management Interface ......................................................................................................................................... 14
Speed Selection ............................................................................................................................................................. 15
Operating Modes ........................................................................................................................................................... 16
Transparent Mode ........................................................................................................................................................... 18
Fiber Optic Input/Output Interface ................................................................................................................................. 18
Power Down Mode ......................................................................................................................................................... 19
Loopback Mode ............................................................................................................................................................. 19
Scrambler/Descrambler .................................................................................................................................................. 19
Output Off Mode ........................................................................................................................................................... 19
Backup Link Mode ......................................................................................................................................................... 19
LED Interface ................................................................................................................................................................. 20
Control Registers ........................................................................................................................................................... 21
Status Registers ............................................................................................................................................................ 23
Electrical Characteristics ............................................................................................................................................... 24
Physical Dimensions ...................................................................................................................................................... 28
Order Information .......................................................................................................................................................... 28
WARRANTY
Micro Linear makes no representations or warranties with respect to the accuracy, utility, or completeness of the contents of this
publication and reserves the right to make changes to specifications and product descriptions at any time without notice. No
license, express or implied, by estoppel or otherwise, to any patents or other intellectual property rights is granted by this
document. The circuits contained in this document are offered as possible applications only. Particular uses or applications may
invalidate some of the specifications and/or product descriptions contained herein. The customer is urged to perform its own
engineering review before deciding on a particular application. Micro Linear assumes no liability whatsoever, and disclaims any
express or implied warranty, relating to sale and/or use of Micro Linear products including liability or warranties relating to
merchantability, fitness for a particular purpose, or infringement of any intellectual property right. Micro Linear products are not
designed for use in medical, life saving, or life sustaining applications. If this document is "Advance", its contents describe a
Micro Linear product that is currently under development. All detailed specifications including pinouts and electrical specifications
may be changed without notice. If this document is "Preliminary", its contents are based on early silicon measurements. Typical
data is representative of the product but is subject to change without notice. Pinout and mechanical dimensions are final.
Preliminary documents supersede all Advance documents and all previous Preliminary versions. If this document is "Final", its
contents are based on a characterized product, and it is believed to be accurate at the time of publication. Final Data Sheets
supersede all previously published versions. This document is Final.
© 2004 Micro Linear Corporation. All rights reserved. All other trademarks are the property of their respective owners.
Products described herein may be covered by one or more of the following U.S. patents: 4,897,611; 4,964,026; 5,027,116; 5,281,862;
5,283,483; 5,418,502; 5,508,570; 5,510,727; 5,523,940; 5,546,017; 5,559,470; 5,565,761; 5,592,128; 5,594,376; 5,652,479;
5,661,427; 5,663,874; 5,672,959; 5,689,167; 5,714,897; 5,717,798; 5,742,151; 5,747,977; 5,754,012; 5,757,174; 5,767,653;
5,777,514; 5,793,168; 5,798,635; 5,804,950; 5,808,455; 5,811,999; 5,818,207; 5,818,669; 5,825,165; 5,825,223; 5,838,723;
5.844,378; 5,844,941. Japan: 2,598,946; 2,619,299; 2,704,176; 2,821,714. Other patents are pending.
2
January 2004
Final Datasheet
DS6652-F-02
ML6652
PIN CONFIGURATION
PIN DESCRIPTIONS
Signal names followed by "#" indicate active low input.
Pin No. Signal Name
CONFIGURATION
4
AD4LIW
I/O
Description
I
5
AD32
I
Sets the value of the Physical Layer (PHY) address bit 4 for accessing the Serial
Management Interface, and determines if the Link Integrity Warning (LIW)
function is enabled or disabled.
The Link Integrity Warning (LIW) function can only be enabled when only one
SPEED is available through setting of SPEED ( pin 27) and/or management
registers. When LIW is enabled and the input link is down at one interface to
the Media Converter, the transmitter output on that interface is turned off for
about 425ms every 3.8 seconds. It applies to both network interfaces and both
data rates. If the link at the other interface to the Media Converter is also
down, there is no output. The LIW function causes the Link Up indicator of the
link partner to blink.
Note: this pin is typically read a few microseconds after power-up, if it is tied
to supplies that do not track the ML6652 power improper results will occur.
Use VCCD (pin 19) as the pull up point, do not add decoupling capacitors to
this input pin (without thoroughly understanding your PCB layout dynamics the
safest course is to make short connections and do not add decoupling
capacitors to this input pin).
Sets the value of the PHY address bits 3 and 2 for accessing the Serial
Management Interface.
Note: this pin is typically read a few microseconds after power-up, if it is tied
to supplies that do not track the ML6652 power improper results will occur.
Use VCCD (pin 19) as the pull up point, do not add decoupling capacitors to
this input pin (without thoroughly understanding your PCB layout dynamics the
safest course is to make short connections and do not add decoupling
capacitors to this input pin).
4
January 2004
Final Datasheet
DS6652-F-02
ML6652
PIN DESCRIPTIONS (continued)
Pin No. Signal Name
6
AD10
I/O
I
Description
Sets the value of the PHY address bits 1 and 0 for accessing the Serial
Management Interface.
Note: this pin is typically read a few microseconds after power-up, if it is tied
to supplies that do not track the ML6652 power improper results will occur.
Use VCCD (pin 19) as the pull up point, do not add decoupling capacitors to
this input pin (without thoroughly understanding your PCB layout dynamics the
safest course is to make short connections and do not add decoupling
capacitors to this input pin).
Pin Name
Input Level
0
1/3 of VCC
2/3 of VCC
VCC
AD4LIW
LIW Function
PHYAD4 Bit
Disabled
0
Enabled
0
Enabled
1
Disabled
1
AD32
PHYAD3 Bit
PHYAD2 Bit
0
0
1
0
1
1
0
1
Table 1.
AD10
PHYAD1 Bit
PHYAD0 Bit
0
0
1
0
1
1
0
1
7
PECLTP
I
The copper interface is selected as shown in Table 2. When twisted pair
interface is selected, the scrambler and descrambler are enabled by default
and can be disabled with a management register bit.
When using twisted pair interface, this pin also defines the maximum
supported link distance. When the 10 meters maximum link length is selected,
the input is not equalized before being sliced.
Note: this pin is typically read a few microseconds after power-up, if it is tied
to supplies that do not track the ML6652 power improper results will occur.
Use VCCD (pin 19) as the pull up point, do not add decoupling capacitors to
this input pin (without thoroughly understanding your PCB layout dynamics the
safest course is to make short connections and do not add decoupling
capacitors to this input pin).
PECLTP
Voltage
0
1/3 of VCC
2/3 of VCC
VCC
Interfaces at
PECLTP
TPINP/TPINN and
<30.3>
TPOUTP/TPOUTN Default
Twisted Pair
0
PECL/LVPECL
Twisted Pair
Twisted Pair
1
0
0
Copper
Length
100BASE-TX
Standard
PCB Traces
PCB Traces
10m
SHORTTP
<30.2>
Default
0
0
1
1
Output
Current
Standard
NA
Low
Standard
LOWITPOUT
<30.4> Default
0
0
1
0
Table 2.
5
January 2004
Final Datasheet
DS6652-F-02
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