IDT71V2578YSA133PF datasheet, PDF

Datasheet> All Categories > IDT71V2578YSA133PF

Preview

IDT71V2578YSA133PF: Description128K X 36, 256K X 18 3.3V Synchronous SRAMs 2.5V I/O, Pipelined Outputs, Burst Counter, Single Cycle Deselect; File Size285KB，22 Pages; ManufacturerIDT (Integrated Device Technology, Inc.); Websitehttp://www.idt.com/

Download Datasheet View All

IDT71V2578YSA133PF Overview

128K X 36, 256K X 18 3.3V Synchronous SRAMs 2.5V I/O, Pipelined Outputs, Burst Counter, Single Cycle Deselect

Preview

Download Datasheet

View All

128K X 36, 256K X 18

3.3V Synchronous SRAMs

2.5V I/O, Pipelined Outputs,

Burst Counter, Single Cycle Deselect

IDT71V2576S

IDT71V2578S

IDT71V2576SA

IDT71V2578SA

Features

128K x 36, 256K x 18 memory configurations

Supports high system speed:

Commercial and Industrial:

– 150MHz 3.8ns clock access time

– 133MHz 4.2ns clock access time

LBO

input selects interleaved or linear burst mode

Self-timed write cycle with global write control (GW), byte write

enable (BWE), and byte writes (BWx)

3.3V core power supply

Power down controlled by ZZ input

2.5V I/O

Optional - Boundary Scan JTAG Interface (IEEE 1149.1

compliant)

Packaged in a JEDEC Standard 100-pin plastic thin quad

flatpack (TQFP), 119 ball grid array (BGA) and 165 fine pitch ball

grid array (fBGA)

Description

The IDT71V2576/78 are high-speed SRAMs organized as 128K x

36/256K x 18. The IDT71V2576/78 SRAMs contain write, data, address

and control registers. Internal logic allows the SRAM to generate a self-

timed write based upon a decision which can be left until the end of the write

cycle.

The burst mode feature offers the highest level of performance to the

system designer, as the IDT71V2576/78 can provide four cycles of data

for a single address presented to the SRAM. An internal burst address

counter accepts the first cycle address from the processor, initiating the

access sequence. The first cycle of output data will be pipelined for one

cycle before it is available on the next rising clock edge. If burst mode

operation is selected (ADV=LOW), the subsequent three cycles of output

data will be available to the user on the next three rising clock edges. The

order of these three addresses are defined by the internal burst counter

and the

LBO

input pin.

The IDT71V2576/78 SRAMs utilize IDT’s latest high-performance

CMOS process and are packaged in a JEDEC standard 14mm x 20mm

100-pin thin plastic quad flatpack (TQFP) as well as a 119 ball grid array

(BGA) and 165 fine pitch ball grid array (fBGA).

Input

Output

Input

I/O

Supply

Synchronous

Asynchronous

Synchronous

N/A

Synchronous

N/A

Synchronous

Asynchronous

Synchronous

N/A

4876 tbl 01

Pin Description Summary

-A

BWE

(1)

CLK

ADV

ADSC

ADSP

LBO

TMS

TDI

TCK

TDO

TRST

I/O

-I/O

, I/O

-I/O

, V

DDQ

Address Inputs

Chip Enable

Chip Selects

Output Enable

Global Write Enable

Byte Write Enable

Individual Byte Write Selects

Clock

Burst Address Advance

Address Status (Cache Controller)

Address Status (Processor)

Linear / Interleaved Burst Order

Test Mode Select

Test Data Input

Test Clock

Test Data Output

JTAG Reset (Optional)

Sleep Mode

Data Input / Output

Core Power, I/O Power

Ground

NOTE:

and

are not applicable for the IDT71V2578.

JUNE 2003

DSC-4876/09

Recommended Resources

Electric guitar effect enhancement circuit

Automatic door control circuit diagram

Circuit diagram based on 50Hz time base signal generator

Thermocouple amplifier circuit

Sony KV-S29 color TV complete power supply diagram

555 car interior temperature controller circuit

A novel 22.5 degree and 11.25 degree multi-octave MMIC: Abstract: Design, fabrication and(haracterization of a novel 22. 50 and 11.250 muftioctave MMIC phase shifter with a sharing Lan;e(oupler is described ever 5 to band. The topology was specifically sel...; JasonYoo Embedded System

Are the prices of several commonly used AVR chips expensive? Friends who have used ATMEGA169, please come in!: Last time, I bought more than 100 yuan worth of ICs from a supplier. The price of ATTINY24A was 2.4 yuan per piece, the price of ATTINY13A seemed to be 2.1 yuan, and the price of ATMEGA169 was 8 yuan....; gh131413 Microchip MCU

Talk about the measurement of MSP430 power consumption: [align=left][color=#000]No matter what the situation, when measuring the power consumption of MSP430, you must pay attention to the prerequisites. Plan the working state of the MSP430 you want to test...; Jacktang Microcontroller MCU

C language video tutorial suitable for embedded beginners, collected!: Friends who have learned about embedded systems know that learning C language is the foundation of embedded systems and is also a very important part. Today, I would like to share with you a C languag...; 深入细化 Embedded System

Testimonials: I can use iar simulation now, thanks to my friends in the forum!...; zhangjun1960 TI Technology Forum

【RT-Thread Software Package Application Works】Photo Album: First of all, I would like to give a good review to this board that RT-THREAD cooperated with Zhengdian Atom. Not only does it have an integrated WIFI chip, but its programming is almost the same as t...; ddllxxrr Real-time operating system RTOS

Shortcut: E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC ED EE EF EG EH EI EJ EK EL EM EN EO EP EQ ER ES ET EU EV EW EX EY EZ F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FE FF FG FH FI FJ FK FL FM FN FO FP FQ FR FS FT FU FV FW FX FY FZ G0 G1 G2 G3 G4 G5 G6 G7 G8 G9 GA GB GC GD GE GF GG GH GI GJ GK GL GM GN GO GP GQ GR GS GT GU GV GW GX GZ H0 H1 H2 H3 H4 H5 H6 H7 H8 HA HB HC HD HE HF HG HH HI HJ HK HL HM HN HO HP HQ HR HS HT HU HV HW HX HY HZ I1 I2 I3 I4 I5 I6 I7 IA IB IC ID IE IF IG IH II IK IL IM IN IO IP IQ IR IS IT IU IV IW IX J0 J1 J2 J6 J7 JA JB JC JD JE JF JG JH JJ JK JL JM JN JP JQ JR JS JT JV JW JX JZ K0 K1 K2 K3 K4 K5 K6 K7 K8 K9 KA KB KC KD KE KF KG KH KI KJ KK KL KM KN KO KP KQ KR KS KT KU KV KW KX KY KZ

Popular Components