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PAL16R8AJC

Description
Progammable Array Logic Series 24 (PAL Series 24)
CategoryProgrammable logic devices    Programmable logic   
File Size449KB,14 Pages
ManufacturerNational Semiconductor(TI )
Websitehttp://www.ti.com
Stay tuned Parametric

PAL16R8AJC Overview

Progammable Array Logic Series 24 (PAL Series 24)

PAL16R8AJC Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerNational Semiconductor(TI )
package instructionDIP, DIP20,.3
Reach Compliance Codeunknown
ArchitecturePAL-TYPE
maximum clock frequency25 MHz
JESD-30 codeR-GDIP-T20
JESD-609 codee0
length24.51 mm
Dedicated input times8
Number of I/O lines
Number of entries8
Output times8
Number of product terms64
Number of terminals20
Maximum operating temperature75 °C
Minimum operating temperature
organize8 DEDICATED INPUTS, 0 I/O
Output functionREGISTERED
Package body materialCERAMIC, GLASS-SEALED
encapsulated codeDIP
Encapsulate equivalent codeDIP20,.3
Package shapeRECTANGULAR
Package formIN-LINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5 V
Programmable logic typeOT PLD
propagation delay20 ns
Certification statusNot Qualified
Maximum seat height5.08 mm
Maximum supply voltage5.25 V
Minimum supply voltage4.75 V
Nominal supply voltage5 V
surface mountNO
technologyTTL
Temperature levelCOMMERCIAL EXTENDED
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width7.62 mm
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