PBRP113ET
PNP 800 mA, 40 V BISS RET; R1 = 1 kΩ, R2 = 1 kΩ
Rev. 01 — 17 December 2007
Product data sheet
1. Product profile
1.1 General description
800 mA PNP low V
CEsat
Breakthrough In Small Signal (BISS) Resistor-Equipped
Transistor (RET) in a small SOT23 (TO-236AB) Surface-Mounted Device (SMD) plastic
package.
NPN complement: PBRN113ET.
1.2 Features
I
800 mA repetitive peak output current
I
High current gain h
FE
I
Built-in bias resistors
I
Simplifies circuit design
I
Low collector-emitter saturation voltage
V
CEsat
I
Reduces component count
I
Reduces pick and place costs
I
±10
% resistor ratio tolerance
1.3 Applications
I
Digital application in automotive and
industrial segments
I
Medium current peripheral driver
I
Switching loads
1.4 Quick reference data
Table 1.
Symbol
V
CEO
I
O
I
ORM
R1
R2/R1
[1]
[2]
[3]
Quick reference data
Parameter
collector-emitter voltage
output current
repetitive peak output current t
p
≤
1 ms;
δ ≤
0.33
bias resistor 1 (input)
bias resistor ratio
Conditions
open base
[1][2]
[3]
Min
-
-
-
0.7
0.9
Typ
-
-
-
1
1
Max
−40
−600
−800
1.3
1.1
Unit
V
mA
mA
kΩ
Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated, mounting pad for
collector 1 cm
2
.
Device mounted on a ceramic PCB, Al
2
O
3
, standard footprint.
Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
NXP Semiconductors
PBRP113ET
PNP 800 mA, 40 V BISS RET; R1 = 1 kΩ, R2 = 1 kΩ
2. Pinning information
Table 2.
Pin
1
2
3
Pinning
Description
input (base)
GND (emitter)
output (collector)
1
2
3
R1
Simplified outline
Symbol
3
1
R2
2
sym003
3. Ordering information
Table 3.
Ordering information
Package
Name
PBRP113ET
-
Description
plastic surface-mounted package; 3 leads
Version
SOT23
Type number
4. Marking
Table 4.
Marking codes
Marking code
[1]
*7K
Type number
PBRP113ET
[1]
* = -: made in Hong Kong
* = p: made in Hong Kong
* = t: made in Malaysia
* = W: made in China
5. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
CBO
V
CEO
V
EBO
V
I
Parameter
collector-base voltage
collector-emitter voltage
emitter-base voltage
input voltage
positive
negative
I
O
I
ORM
output current
repetitive peak output current
t
p
≤
1 ms;
δ ≤
0.33
[1][2]
[3]
Conditions
open emitter
open base
open collector
Min
-
-
-
-
-
-
-
Max
−40
−40
−10
+10
−10
−600
−800
Unit
V
V
V
V
V
mA
mA
PBRP113ET_1
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 17 December 2007
2 of 12
NXP Semiconductors
PBRP113ET
PNP 800 mA, 40 V BISS RET; R1 = 1 kΩ, R2 = 1 kΩ
Table 5.
Limiting values
…continued
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
P
tot
Parameter
total power dissipation
Conditions
T
amb
≤
25
°C
[3]
[1]
[2]
Min
-
-
-
-
−55
−65
Max
250
370
570
150
+150
+150
Unit
mW
mW
mW
°C
°C
°C
T
j
T
amb
T
stg
[1]
[2]
[3]
junction temperature
ambient temperature
storage temperature
Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm
2
.
Device mounted on a ceramic PCB, Al
2
O
3
, standard footprint.
Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
600
(1)
006aaa998
P
tot
(mW)
400
(2)
(3)
200
0
−75
−25
25
75
125
175
T
amb
(°C)
(1) Ceramic PCB, Al
2
O
3
standard footprint
(2) FR4 PCB, mounting pad for collector 1 cm
2
(3) FR4 PCB, standard footprint
Fig 1. Power derating curves for SOT23 (TO-236AB)
PBRP113ET_1
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 17 December 2007
3 of 12
NXP Semiconductors
PBRP113ET
PNP 800 mA, 40 V BISS RET; R1 = 1 kΩ, R2 = 1 kΩ
6. Thermal characteristics
Table 6.
Symbol
R
th(j-a)
Thermal characteristics
Parameter
thermal resistance from
junction to ambient
Conditions
in free air
[1]
[2]
[3]
Min
-
-
-
-
Typ
-
-
-
-
Max
500
338
219
105
Unit
K/W
K/W
K/W
K/W
R
th(j-sp)
[1]
[2]
[3]
thermal resistance from
junction to solder point
Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm
2
.
Device mounted on a ceramic PCB, Al
2
O
3
, standard footprint.
10
3
Z
th(j-a)
(K/W)
10
2
δ
=1
0.50
0.33
0.20
0.10
0.05
10
0.02
0.01
0.75
006aab000
1
0
10
−1
10
−5
10
−4
10
−3
10
−2
10
−1
1
10
10
2
t
p
(s)
10
3
FR4 PCB, standard footprint
Fig 2. Transient thermal impedance from junction to ambient as a function of pulse duration for
SOT23 (TO-236AB); typical values
PBRP113ET_1
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 17 December 2007
4 of 12
NXP Semiconductors
PBRP113ET
PNP 800 mA, 40 V BISS RET; R1 = 1 kΩ, R2 = 1 kΩ
10
3
Z
th(j-a)
(K/W)
10
2
δ
=1
0.50
0.33
0.20
0.10
0.05
10
0.02
0.01
0
006aab001
0.75
1
10
−1
10
−5
10
−4
10
−3
10
−2
10
−1
1
10
10
2
t
p
(s)
10
3
FR4 PCB, mounting pad for collector 1 cm
2
Fig 3. Transient thermal impedance from junction to ambient as a function of pulse duration for
SOT23 (TO-236AB); typical values
10
3
Z
th(j-a)
(K/W)
10
2
006aab002
δ
=1
0.50
0.75
0.33
0.20
0.10
10
0.05
0.02
0.01
1
0
10
−1
10
−5
10
−4
10
−3
10
−2
10
−1
1
10
10
2
t
p
(s)
10
3
Ceramic PCB, Al
2
O
3
standard footprint
Fig 4. Transient thermal impedance from junction to ambient as a function of pulse duration for
SOT23 (TO-236AB); typical values
PBRP113ET_1
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 17 December 2007
5 of 12
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