EFR32MG13 Mighty Gecko Multi-Protocol
Wireless SoC Family Data Sheet
The Mighty Gecko multi-protocol family of SoCs is part of the
Wireless Gecko portfolio. Mighty Gecko SoCs are ideal for ena-
bling energy-friendly multi-protocol, multi-band networking for IoT
devices.
The single-die solution provides industry-leading energy efficiency, ultra-fast wakeup
times, a scalable power amplifier, and no-compromise MCU features.
Mighty Gecko applications include:
•
•
•
•
•
•
IoT Multi-Protocol Devices
Connected Home
Lighting
Health and Wellness
Metering
Home and Building Automation and Security
KEY FEATURES
• 32-bit ARM® Cortex®-M4 core with 40
MHz maximum operating frequency
• 512 kB of flash and 64 kB of RAM
• Pin-compatible across EFR32MG families
(exceptions apply for 5V-tolerant pins)
• 12-channel Peripheral Reflex System
enabling autonomous interaction of MCU
peripherals
• Autonomous Hardware Crypto Accelerator
and True Random Number Generator
• Precision Low Frequency Oscillator meets
BLE Sleep Clock accuracy requirements
• Integrated PA with up to 19 dBm (2.4
GHz) or 20 dBm (Sub-GHz) tx power
• Integrated balun for 2.4 GHz
• Robust peripheral set and up to 31 GPIO
Core / Memory
Clock Management
H-F Crystal
Oscillator
H-F
RC Oscillator
Precision L-F
RC Oscillator
Energy Management
Voltage
Regulator
DC-DC
Converter
Brown-Out
Detector
Voltage Monitor
Other
CRYPTO
CRC
ARM Cortex M4 processor
with DSP extensions, FPU and MPU
TM
Flash Program
Memory
Auxiliary H-F RC
Oscillator
L-F Crystal
Oscillator
L-F RC
Oscillator
Power-On Reset
True Random
Number Generator
SMU
ETM
Debug Interface
RAM Memory
LDMA
Controller
Ultra L-F RC
Oscillator
32-bit bus
Peripheral Reflex System
Radio Transceiver
RFSENSE
Sub GHz
BUFC
FRC
LNA
RF Frontend
PA
Q
I
PGA
To Sub GHz
receive I/Q
mixers and PA
DEMOD
Serial
Interfaces
USART
I/O Ports
External
Interrupts
General
Purpose I/O
Timers and Triggers
Timer/Counter
Protocol Timer
Analog I/F
ADC
Analog
Comparator
IDAC
Capacitive
Touch
VDAC
IFADC
Low Energy
UART
TM
Low Energy
Timer
Low Energy
Sensor Interface
CRC
RAC
RFSENSE
AGC
I
2
C
Pin Reset
Pulse Counter
Real Time
Counter and
Calendar
Watchdog Timer
2.4 GHz
BALUN
I
LNA
RF Frontend
PA
Q
Frequency
Synthesizer
To 2.4 GHz receive
I/Q mixers and PA
MOD
Pin Wakeup
To Sub GHz
and 2.4 GHz PA
Cryotimer
Op-Amp
Lowest power mode with peripheral operational:
EM0—Active
EM1—Sleep
EM2—Deep Sleep
EM3—Stop
EM4—Hibernate
EM4—Shutoff
silabs.com
| Building a more connected world.
Rev. 1.6
EFR32MG13 Mighty Gecko Multi-Protocol Wireless SoC Family Data Sheet
Feature List
1. Feature List
The EFR32MG13 highlighted features are listed below.
•
Low Power Wireless System-on-Chip
• High Performance 32-bit 40 MHz ARM Cortex
®
-M4 with
DSP instruction and floating-point unit for efficient signal
processing
• Embedded Trace Macrocell (ETM) for advanced debugging
• 512 kB flash program memory
• 64 kB RAM data memory
• 2.4 GHz and Sub-GHz radio operation
• Transmit power:
• 2.4 GHz radio: Up to 19 dBm
• Sub-GHz radio: Up to 20 dBm
•
Low Energy Consumption
• 10.3 mA RX current at 250 kbps, DSSS-OQPSK, 2.4 GHz
• 9.5 mA RX current at 1 Mbps, GFSK, 2.4 GHz
• 8.4 mA RX current at 38.4 kbps, GFSK, 169 MHz
• 8.5 mA TX current at 0 dBm output power at 2.4 GHz
• 35.3 mA TX current at 14 dBm output power at 868 MHz
• 69 μA/MHz in Active Mode (EM0)
• 1.3 μA EM2 DeepSleep current (16 kB RAM retention and
RTCC running from LFRCO)
•
High Receiver Performance
• -103.3 dBm sensitivity at 125 kbit/s GFSK, 2.4 GHz
• -94.8 dBm sensitivity at 1 Mbit/s GFSK, 2.4 GHz
• -91.5 dBm sensitivity at 2 Mbit/s GFSK, 2.4 GHz
• -102.7 dBm sensitivity at 250 kbps DSSS-OQPSK, 2.4 GHz
• -126.2 dBm sensitivity at 600 bps, GFSK, 915 MHz
• -120.6 dBm sensitivity at 2.4 kbps, GFSK, 868 MHz
• -107.4 dBm sensitivity at 4.8 kbps, OOK, 433 MHz
• -112.2 dBm sensitivity at 38.4 kbps, GFSK, 169 MHz
•
Supported Modulation Formats
• 2/4 (G)FSK with fully configurable shaping
• BPSK / DBPSK TX
• OOK / ASK
• Shaped OQPSK / (G)MSK
• Configurable DSSS and FEC
•
Supported Protocols
• Zigbee
• Thread
• Bluetooth
®
Low Energy (Bluetooth 5)
• Proprietary Protocols
• Wireless M-Bus
• Selected IEEE 802.15.4g SUN-FSK PHYs
• Low Power Wide Area Networks
•
Suitable for Systems Targeting Compliance With:
• FCC Part 90.210 Mask D, FCC part 15.247, 15.231, 15.249
• ETSI Category I Operation, EN 300 220, EN 300 328
• ARIB T-108, T-96
• China regulatory
•
Wide selection of MCU peripherals
• • 12-bit 1 Msps SAR Analog to Digital Converter (ADC)
• 2 × Analog Comparator (ACMP)
• 2 × Digital to Analog Converter (VDAC)
• 3 × Operational Amplifier (Opamp)
• Digital to Analog Current Converter (IDAC)
• Low-Energy Sensor Interface (LESENSE)
• Multi-channel Capacitive Sense Interface (CSEN)
• Up to 31 pins connected to analog channels (APORT)
shared between analog peripherals
• Up to 31 General Purpose I/O pins with output state re-
tention and asynchronous interrupts
• 8 Channel DMA Controller
• 12 Channel Peripheral Reflex System (PRS)
• 2 × 16-bit Timer/Counter
• 3 or 4 Compare/Capture/PWM channels
• 1 × 32-bit Timer/Counter
• 3 Compare/Capture/PWM channels
• Precision Low Frequency RC Oscillator (PLFRCO)
• 32-bit Real Time Counter and Calendar
• 16-bit Low Energy Timer for waveform generation
• 32-bit Ultra Low Energy Timer/Counter for periodic
wake-up from any Energy Mode
• 16-bit Pulse Counter with asynchronous operation
• 2 × Watchdog Timer with dedicated RC oscillator
• 3 × Universal Synchronous/Asynchronous Receiver/
Transmitter (UART/SPI/SmartCard (ISO 7816)/IrDA/I
2
S)
• Low Energy UART (LEUART
™
)
• 2 × I
2
C interface with SMBus support and address rec-
ognition in EM3 Stop
Wide Operating Range
• 1.8 V to 3.8 V single power supply
• Integrated DC-DC, down to 1.8 V output with up to 200 mA
load current for system
• Standard (-40 °C to 85 °C) and Extended (-40 °C to 125 °C)
temperature grades available
Support for Internet Security
• General Purpose CRC
• True Random Number Generator
• 2 × Hardware Cryptographic Acceleration for AES 128/256,
SHA-1, SHA-2 (SHA-224 and SHA-256) and ECC
QFN32 5x5 mm Package
QFN48 7x7 mm Package
•
•
•
•
silabs.com
| Building a more connected world.
Rev. 1.6 | 2
EFR32MG13 Mighty Gecko Multi-Protocol Wireless SoC Family Data Sheet
Ordering Information
2. Ordering Information
Table 2.1. Ordering Information
Frequency Band
@ Max TX Power
2.4 GHz @ 19 dBm
Sub-GHz @ 20 dBm
Ordering Code
EFR32MG13P733F512GM48-D
Protocol
Stack
Bluetooth LE
Zigbee
Thread
Proprietary
Flash
(kB)
512
RAM
(kB)
64
GPIO
28
Package
QFN48
Temp Range
-40 to +85°C
EFR32MG13P733F512IM48-D
Bluetooth LE
Zigbee
Thread
Proprietary
2.4 GHz @ 19 dBm
Sub-GHz @ 20 dBm
512
64
28
QFN48
-40 to +125°C
EFR32MG13P732F512GM48-D
Bluetooth LE
Zigbee
Thread
Proprietary
2.4 GHz @ 19 dBm
512
64
31
QFN48
-40 to +85°C
EFR32MG13P732F512IM48-D
Bluetooth LE
Zigbee
Thread
Proprietary
2.4 GHz @ 19 dBm
512
64
31
QFN48
-40 to +125°C
EFR32MG13P732F512GM32-D
Bluetooth LE
Zigbee
Thread
Proprietary
2.4 GHz @ 19 dBm
512
64
16
QFN32
-40 to +85°C
EFR32MG13P732F512IM32-D
Bluetooth LE
Zigbee
Thread
Proprietary
2.4 GHz @ 19 dBm
512
64
16
QFN32
-40 to +125°C
EFR32MG13P632F512GM48-D
Bluetooth LE
Zigbee
Thread
Proprietary
2.4 GHz @ 10 dBm
512
64
31
QFN48
-40 to +85°C
EFR32MG13P632F512GM32-D
Bluetooth LE
Zigbee
Thread
Proprietary
2.4 GHz @ 10 dBm
512
64
16
QFN32
-40 to +85°C
silabs.com
| Building a more connected world.
Rev. 1.6 | 3
EFR32MG13 Mighty Gecko Multi-Protocol Wireless SoC Family Data Sheet
Ordering Information
EFR32 X G 1 3 P 132 F 512 G M 48
–
A R
Tape and Reel (Optional)
Revision
Pin Count
Package – M (QFN), L (BGA)
Temperature Grade – G (-40 to +85 °C), -I (-40 to +125 °C)
Flash Memory Size in kB
Memory Type (Flash)
Feature Set Code – r2r1r0
r2: Reserved
r1: RF Type – 3 (TRX), 2 (RX), 1 (TX)
r0: Frequency Band – 1 (Sub-GHz), 2 (2.4 GHz), 3 (Dual-Band)
Performance Grade – P (Performance), B (Basic), V (Value)
Device Configuration
Series
Gecko
Family – M (Mighty), B (Blue), F (Flex)
Wireless Gecko 32-bit
Figure 2.1. Ordering Code Key
silabs.com
| Building a more connected world.
Rev. 1.6 | 4
Table of Contents
1. Feature List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
2. Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
3. System Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.1 Introduction .
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
. 8
. 8
. 9
. 9
. 9
. 9
.10
.10
.10
.10
.10
.11
.11
.12
.12
.12
.12
.12
.13
.13
.13
.13
.13
.13
.13
.14
.14
.14
.14
.14
.14
.14
.14
.14
.15
.15
.15
.15
.15
.15
3.2 Radio . . . . . . . . . . . .
3.2.1 Antenna Interface . . . . . .
3.2.2 Fractional-N Frequency Synthesizer
3.2.3 Receiver Architecture . . . . .
3.2.4 Transmitter Architecture . . . .
3.2.5 Wake on Radio . . . . . . .
3.2.6 RFSENSE . . . . . . . . .
3.2.7 Flexible Frame Handling . . . .
3.2.8 Packet and State Trace . . . .
3.2.9 Data Buffering . . . . . . . .
3.2.10 Radio Controller (RAC) . . . .
3.2.11 Random Number Generator . .
3.3 Power . . . . . . . . . . .
3.3.1 Energy Management Unit (EMU)
3.3.2 DC-DC Converter . . . . .
3.3.3 Power Domains . . . . . .
3.5 Clocking . . . . . . . . . .
3.5.1 Clock Management Unit (CMU) .
3.5.2 Internal and External Oscillators.
.
.
.
.
.
.
.
3.4 General Purpose Input/Output (GPIO) .
3.6 Counters/Timers and PWM . . . . . . . . .
3.6.1 Timer/Counter (TIMER) . . . . . . . .
3.6.2 Wide Timer/Counter (WTIMER) . . . . . .
3.6.3 Real Time Counter and Calendar (RTCC) . .
3.6.4 Low Energy Timer (LETIMER) . . . . . .
3.6.5 Ultra Low Power Wake-up Timer (CRYOTIMER)
3.6.6 Pulse Counter (PCNT) . . . . . . . . .
3.6.7 Watchdog Timer (WDOG) . . . . . . . .
3.7 Communications and Other Digital Peripherals . . . . . . . . . .
3.7.1 Universal Synchronous/Asynchronous Receiver/Transmitter (USART) .
3.7.2 Low Energy Universal Asynchronous Receiver/Transmitter (LEUART) .
3.7.3 Inter-Integrated Circuit Interface (I
2
C) . . . . . . . . . . . .
3.7.4 Peripheral Reflex System (PRS) . . . . . . . . . . . . .
3.7.5 Low Energy Sensor Interface (LESENSE) . . . . . . . . . .
3.8 Security Features . . . . . . . . . . . . . .
3.8.1 General Purpose Cyclic Redundancy Check (GPCRC)
3.8.2 Crypto Accelerator (CRYPTO) . . . . . . . .
3.8.3 True Random Number Generator (TRNG) . . . .
3.8.4 Security Management Unit (SMU) . . . . . . .
silabs.com
| Building a more connected world.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
Rev. 1.6 | 5
PCB Design
京公网安备 11010802033920号
EEWORLD
