EXPOSED PAD (PIN 29) IS GND, MUST BE SOLDERED TO PCB
LT3694-1 PINOUT IS SHOWN IN PARENTHESIS
FE PACKAGE
20-LEAD PLASTIC TSSOP
θ
JA
= 38°C/W
EXPOSED PAD (PIN 21) IS GND, MUST BE SOLDERED TO PCB
LT3694-1 PINOUT IS SHOWN IN PARENTHESIS
ORDER INFORMATION
LEAD FREE FINISH
LT3694EUFD#PBF
LT3694IUFD#PBF
LT3694EFE#PBF
LT3694IFE#PBF
LT3694-1EUFD#PBF
LT3694-1IUFD#PBF
LT3694-1EFE#PBF
LT3694-1IFE#PBF
TAPE AND REEL
LT3694EUFD#TRPBF
LT3694IUFD#TRPBF
LT3694EFE#TRPBF
LT3694IFE#TRPBF
LT3694-1EUFD#TRPBF
LT3694-1IUFD#TRPBF
LT3694-1EFE#TRPBF
LT3694-1IFE#TRPBF
PART MARKING*
3694
3694
LT3694FE
LT3694FE
36941
36941
LT3694FE-1
LT3694FE-1
PACKAGE DESCRIPTION
28-Lead (4mm
×
5mm) Plastic QFN
28-Lead (4mm
×
5mm) Plastic QFN
20-Lead Plastic TSSOP
20-Lead Plastic TSSOP
28-Lead (4mm
×
5mm) Plastic QFN
28-Lead (4mm
×
5mm) Plastic QFN
20-Lead Plastic TSSOP
20-Lead Plastic TSSOP
TEMPERATURE RANGE
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to:
http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to:
http://www.linear.com/tapeandreel/
36941fb
2
LT3694/LT3694-1
ELECTRICAL CHARACTERISTICS
PARAMETER
V
IN
Internal Undervoltage Lockout
Overvoltage Shutdown Threshold
Input Quiescent Current
Bias Quiescent Current
Shutdown Current
EN/UVLO Threshold, Bias On
EN/UVLO Threshold, Switching On
Reference Voltage Line Regulation
Switching Frequency
SYNC Input Frequency Range
V
IH
, SYNC
V
IL
, SYNC
V
OH
, CLKOUT
V
OL
, CLKOUT
PGOOD Output Voltage Low
PGOOD Leakage
PGOOD Threshold (Relative to V
FB
)
Switching Regulator
Feedback Pin Voltage
Feedback Pin Bias Current
Error Amplifier Transconductance
Error Amplifier Voltage Gain
TRK/SS Pull-Up Current
TRK/SS Threshold to Start Switching
V
C1
Source Current
V
C1
Sink Current
V
C1
Clamp Voltage
V
C1
Switching Threshold
V
C1
to Switch Current Gain
Switch Leakage Current
Minimum Boost Voltage Above Switch
Switch Current Limit (Note 3)
Switch V
CESAT
BST Operating Current
V
F
, BST Diode
I
L
BST Diode
DA Current Limit
Minimum Switch Off-Time
V
IN
= 36V
(Note 4)
(Note 3) 10% Duty Cycle
I
SW1
= 3A
I
SW1
= 3A
I
BST
= 100mA
V
BST
– V
BIAS
= 36V
l
l
l
l
l
l
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C, V
IN
= 12V, V
BIAS
= 3V, unless otherwise noted. (Notes 2, 9)
CONDITIONS
l
l
MIN
3.5
36
TYP
3.8
38
1
2
0.1
MAX
4
40
2
3.5
2
1.23
1.1
2.5
0.35
UNITS
V
V
mA
mA
µA
mV
V
%/V
MHz
MHz
V
V
V
V
V
nA
%
mV
nA
µS
V/V
Not Switching
Not Switching
V
EN/UVLO
= 0.1V
350
1.16
0.9
0.25
1.5
1.6
5V < V
IN
< 36V
R
T
= 40.2k
LT3694 Only
LT3694 Only
LT3694 Only
I
CLKOUT
= –50µA, LT3694-1 Only
I
CLKOUT
= 50µA, LT3694-1 Only
I
PGOOD
= 250µA
V
PGOOD
= 2V
(Note 8)
86
735
l
l
l
l
l
l
500
1.2
0.01
1.0
2.6
0.3
0.2
10
90
750
–50
350
600
0.4
1000
94
765
–500
–2
35
V
C
= 0.6V
V
C
= 0.6V
–3
50
–20
28
2
0.75
3.6
0.01
1.8
–4
70
µA
mV
µA
µA
V
V
A/V
10
2.5
6
µA
V
A
mV
mA
V
µA
3.5
4.9
600
60
0.8
1
2.6
3.6
4.5
140
A
ns
36941fb
3
LT3694/LT3694-1
ELECTRICAL CHARACTERISTICS
PARAMETER
LDO Regulator
Feedback Pin Voltage
Feedback Pin Bias Current
Error Amplifier Voltage Gain
TRK/SS Pull-Up Current
TRK/SS Threshold to Shut Down LDO
Line Regulation
Load Regulation
Base Drive
Current Limit Threshold
Short-Circuit Current Limit Threshold
Minimum BIAS to DRV Voltage (Note 7)
Minimum V
IN
to DRV Voltage
V
FB
= 0
I
DRV
= 10mA
I
DRV
= 10mA
l
l
l
l
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C, V
IN
= 12V, V
BIAS
= 3V, unless otherwise noted. (Notes 2, 9)
CONDITIONS
MIN
735
TYP
750
–50
2800
–2
35
5V < V
IN
< 36V
I
DRV
From 0.1mA to 10mA
l
l
MAX
765
–500
–4
70
UNITS
mV
nA
µA
mV
%/V
mV/mA
–3
50
0.025
0.5
10
47
22
15
60
26
0.3
2.0
20
70
30
0.9
2.3
mA
mV
mV
V
V
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
The LT3694E is guaranteed to meet performance specifications
from 0°C to 125°C junction temperature. Specifications over the –40°C
to 125°C operating junction temperature range are assured by design,
characterization and correlation with statistical process controls. The
LT3694I is guaranteed to meet performance specifications from –40°C to
125°C junction temperature.
Note 3:
Current limit is guaranteed by design and/or correlation to static
test. Slope compensation reduces current limit at higher duty cycles.
Note 4:
This is the minimum voltage across the boost capacitor needed to
guarantee full saturation of the internal power switch.
Note 5:
This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions.
Junction temperature will exceed the maximum operating range when
overtemperature protection is active. Continuous operation above the
specified maximum operating junction temperature may impair
device reliability.
Note 6:
Absolute Maximum Voltage at V
IN
and EN/UVLO pins is 70V for
non-repetitive, 1 second transients and 36V for continuous operation.
Note 7:
The LDO will function if the BIAS to DRV differential is not met,
but the base drive current will be drawn from V
IN
instead of BIAS.
Note 8:
The PGOOD pin will pull low when the voltage on any of the three
FB pins is lower than the PGOOD threshold value.
Note 9:
Positive currents flow into pins, negative currents flow out of pins.
Minimum and maximum values refer to absolute values.
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FPGA/CPLD
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