LTC1749
12-Bit, 80Msps
Wide Bandwidth ADC
DESCRIPTIO
The LTC
®
1749 is an 80Msps, 12-bit A/D converter de-
signed for digitizing wide dynamic range signals up to
frequencies of 500MHz. The input range of the ADC can be
optimized with the on-chip PGA sample-and-hold circuit
and flexible reference circuitry.
The LTC1749 has a highly linear sample-and-hold circuit
with a bandwidth of 500MHz. The SFDR is 80dB with an
input frequency of 250MHz. Ultralow jitter of 0.15ps
RMS
allows undersampling of IF frequencies with minimal
degradation in SNR. DC specs include
±1LSB
INL and no
missing codes.
The digital interface is compatible with 5V, 3V, 2V and
LVDS logic systems. The ENC and ENC inputs may be
driven differentially from PECL, GTL and other low swing
logic families or from single-ended TTL or CMOS. The low
noise, high gain ENC and ENC inputs may also be driven
by a sinusoidal signal without degrading performance. A
separate output power supply can be operated from 0.5V
to 5V, making it easy to connect directly to low voltage
DSPs or FIFOs.
The 48-pin TSSOP package with a flow-through pinout
simplifies the board layout.
, LTC and LT are registered trademarks of Linear Technology Corporation.
FEATURES
s
s
s
s
s
s
s
s
s
s
s
s
Sample Rate: 80Msps
PGA Front End (2.25V
P-P
or 1.35V
P-P
Input Range)
71.8dB SNR and 87dB SFDR (PGA = 0)
70.2dB SNR and 87dB SFDR (PGA = 1)
500MHz Full Power Bandwidth S/H
No Missing Codes
Single 5V Supply
Power Dissipation: 1.45W
Two Pin Selectable Reference Values
Data Ready Output Clock
Pin Compatible 14-Bit 80Msps Device (LTC1750)
48-Pin TSSOP Package
APPLICATIO S
s
s
s
s
s
s
s
Direct IF Sampling
Telecommunications
Receivers
Cellular Base Stations
Spectrum Analysis
Communications Test Equipment
Undersampling
BLOCK DIAGRA
PGA
A
IN+
80Msps, 12-Bit ADC with a 2.25V Differential Input Range
OV
DD
0.1µF
S/H
CIRCUIT
12-BIT
PIPELINED ADC
CORRECTION
LOGIC AND
SHIFT
REGISTER
12
OUTPUT
LATCHES
•
•
•
D11
D0
CLKOUT
0.5V TO 5V
0.1µF
±1.125V
DIFFERENTIAL
–
ANALOG INPUT A
IN
SENSE
BUFFER
RANGE
SELECT
DIFF AMP
GND
CONTROL LOGIC
1749 BD
V
CM
4.7µF
2V
REF
REFLB
0.1µF
1µF
REFHA
4.7µF
REFLA
REFHB
0.1µF
ENC
ENC
1µF
DIFFERENTIAL
ENCODE INPUT
U
W
U
OGND
V
DD
1µF
1µF
5V
1µF
MSBINV
1749f
1
LTC1749
ABSOLUTE
MAXIMUM
RATINGS
OV
DD
= V
DD
(Notes 1, 2)
PACKAGE/ORDER INFORMATION
TOP VIEW
SENSE
V
CM
GND
A
IN+
A
IN–
GND
V
DD
V
DD
GND
REFLB
REFHA
GND
GND
REFLA
REFHB
GND
V
DD
V
DD
GND
V
DD
GND
MSBINV
ENC
ENC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
FW PACKAGE
48-LEAD PLASTIC TSSOP
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
OF
OGND
D11
D10
D9
OV
DD
D8
D7
D6
D5
OGND
GND
GND
D4
D3
D2
OV
DD
D1
D0
NC
NC
OGND
CLKOUT
PGA
Supply Voltage (V
DD
) ............................................. 5.5V
Analog Input Voltage (Note 3) .... – 0.3V to (V
DD
+ 0.3V)
Digital Input Voltage (Note 4) ..... – 0.3V to (V
DD
+ 0.3V)
Digital Output Voltage ................. – 0.3V to (V
DD
+ 0.3V)
OGND Voltage ..............................................– 0.3V to 1V
Power Dissipation ............................................ 2000mW
Operating Temperature Range
LTC1749C ............................................... 0°C to 70°C
LTC1749I ............................................ – 40°C to 85°C
Storage Temperature Range ................. – 65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
ORDER PART
NUMBER
LTC1749CFW
LTC1749IFW
T
JMAX
= 150°C,
θ
JA
= 35°C/W
Consult LTC Marketing for parts specified with wider operating temperature ranges.
CO VERTER CHARACTERISTICS
PARAMETER
Resolution (No Missing Codes)
Integral Linearity Error
Differential Linearity Error
Offset Error
Gain Error
Full-Scale Tempco
Offset Tempco
Input Referred Noise (Transition Noise)
CONDITIONS
The
q
indicates specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. (Note 5)
q
(Note 6)
q
q
(Note 7) External Reference (V
SENSE
= 1.125V, PGA = 0)
External Reference (V
SENSE
= 1.125V, PGA = 0)
Internal Reference
External Reference (V
SENSE
= 1.125V)
V
SENSE
= 1.125V, PGA = 0
MIN
12
– 1.0
–1.5
–0.8
–35
–3.5
TYP
±0.4
±0.2
±8
±1
±40
±20
±20
0.23
MAX
1.0
1.5
0.8
35
3.5
UNITS
Bits
LSB
LSB
LSB
mV
%FS
ppm/°C
ppm/°C
µV/°C
LSB
RMS
A ALOG I PUT
SYMBOL
V
IN
I
IN
C
IN
t
ACQ
t
AP
t
JITTER
CMRR
The
q
indicates specifications which apply over the full operating temperature range, otherwise
specifications are at T
A
= 25°C. (Note 5)
PARAMETER
Analog Input Range (Note 8)
Analog Input Leakage Current
Analog Input Capacitance
Sample-and-Hold Acquisition Time
Sample-and-Hold Acquisition Delay Time
Sample-and-Hold Acquisition Delay Time Jitter
Analog Input Common Mode Rejection Ratio
CONDITIONS
4.75V
≤
V
DD
≤
5.25V
0 < A
IN+
, A
IN–
< V
DD
Sample Mode ENC < ENC
Hold Mode ENC > ENC
MIN
q
q
–1
q
1.5V < (A
IN–
= A
IN+
) < 3V
TYP
MAX
±0.7
to
±1.125
1
6.9
2.4
5
6
0
0.15
80
UNITS
V
µA
pF
pF
ns
ns
ps
RMS
dB
1749f
2
U
W
U
U
W W
W
U
U
U
LTC1749
DY A IC ACCURACY
SYMBOL
SNR
PARAMETER
Signal-to-Noise Ratio
SFDR
S/(N + D)
THD
IMD
I TER AL REFERE CE CHARACTERISTICS
PARAMETER
V
CM
Output Voltage
V
CM
Output Tempco
V
CM
Line Regulation
V
CM
Output Resistance
CONDITIONS
I
OUT
= 0
I
OUT
= 0
4.75V
≤
V
DD
≤
5.25V
1mA
≤ I
OUT
≤
1mA
U
W U
U
T
A
= 25°C, A
IN
= –1dBFS (Note 5), V
SENSE
= V
DD
CONDITIONS
5MHz Input Signal (PGA = 0)
5MHz Input Signal (PGA = 1)
30MHz Input Signal (PGA = 0)
30MHz Input Signal (PGA = 1)
70MHz Input Signal (PGA = 0)
70MHz Input Signal (PGA = 1)
140MHz Input Signal (PGA = 1)
250MHz Input Signal (PGA = 1)
350MHz Input Signal (PGA = 1)
70.5
MIN
TYP
71.8
70.2
71.7
70.2
71.4
70.1
69.8
69.3
67.4
87
87
76
83
76
83
87
90
85
87
90
84
80
74
71.7
70.1
71.6
70.0
71.2
69.9
68.6
–87
–87
–87
–87
–85
–87
78
–87
–87
500
MAX
UNITS
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dBc
dBc
MHz
68.8
Spurious Free Dynamic Range
5MHz Input Signal (PGA = 0)
5MHz Input Signal (PGA = 1)
30MHz Input Signal (PGA = 0) (HD2 and HD3)
30MHz Input Signal (PGA = 0) (Other)
70MHz Input Signal (PGA = 0)
70MHz Input Signal (PGA = 1) (HD2 and HD3)
70MHz Input Signal (PGA = 1) (Other)
140MHz Input Signal (PGA = 1)
250MHz Input Signal (PGA = 1)
350MHz Input Signal (PGA = 1)
Signal-to-(Noise + Distortion) Ratio
5MHz Input Signal (PGA = 0)
5MHz Input Signal (PGA = 1)
30MHz Input Signal (PGA = 0)
30MHz Input Signal (PGA = 1)
70MHz Input Signal (PGA = 0)
70MHz Input Signal (PGA = 1)
250MHz Input Signal (PGA = 1)
Total Harmonic Distortion
5MHz Input Signal, First 5 Harmonics (PGA = 0)
5MHz Input Signal, First 5 Harmonics (PGA = 1)
30MHz Input Signal, First 5 Harmonics (PGA = 0)
30MHz Input Signal, First 5 Harmonics (PGA = 1)
70MHz Input Signal, First 5 Harmonics (PGA = 0)
70MHz Input Signal, First 5 Harmonics (PGA = 1)
250MHz Input Signal (PGA = 1)
Intermodulation Distortion
Sample-and-Hold Bandwidth
f
IN1
= 2.52MHz, f
IN2
= 5.2MHz (PGA = 0)
f
IN1
= 2.52MHz, f
IN2
= 5.2MHz (PGA = 1)
R
SOURCE
= 50Ω
U
(Note 5)
MIN
1.95
TYP
2
±30
3
4
MAX
2.05
UNITS
V
ppm/°C
mV/V
Ω
1749f
3
LTC1749
DIGITAL I PUTS A D DIGITAL OUTPUTS
SYMBOL
V
IH
V
IL
I
IN
C
IN
V
OH
V
OL
I
SOURCE
I
SINK
PARAMETER
High Level Input Voltage
Low Level Input Voltage
Digital Input Current
Digital Input Capacitance
High Level Output Voltage
Low Level Output Voltage
Output Source Current
Output Sink Current
CONDITIONS
V
DD
= 5.25V, MSBINV and PGA
V
DD
= 4.75V, MSBINV and PGA
V
IN
= 0V to V
DD
MSBINV and PGA Only
OV
DD
= 4.75V
OV
DD
= 4.75V
V
OUT
= 0V
V
OUT
= 5V
I
O
= –10µA
I
O
= – 200µA
I
O
= 160µA
I
O
= 1.6mA
q
q
q
q
q
The
q
indicates specifications which apply over the full
operating temperature range, otherwise specifications are at T
A
= 25°C. (Note 5)
MIN
2.4
0.8
±10
1.5
4.74
4
4.74
0.05
0.1
– 50
50
0.4
TYP
MAX
UNITS
V
V
µA
pF
V
V
V
V
mA
mA
POWER REQUIRE E TS
SYMBOL
V
DD
I
DD
P
DIS
OV
DD
PARAMETER
Positive Supply Voltage
Positive Supply Current
Power Dissipation
Digital Output Supply Voltage
The
q
indicates specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. (Note 5)
CONDITIONS
q
q
0.5
MIN
4.75
290
1.45
TYP
MAX
5.25
338
1.69
V
DD
UNITS
V
mA
W
V
TI I G CHARACTERISTICS
SYMBOL
t
0
t
1
t
2
t
3
t
4
t
5
t
6
t
7
t
8
t
9
t
10
PARAMETER
ENC Period
ENC High
ENC Low
Aperture Delay
ENC to CLKOUT Falling
ENC to CLKOUT Rising
For 80Msps 50% Duty Cycle
ENC to DATA Delay
ENC to DATA Delay (Hold Time)
ENC to DATA Delay (Setup Time)
For 80Msps 50% Duty Cycle
CLKOUT to DATA Delay (Hold Time),
80Msps 50% Duty Cycle
CLKOUT to DATA Delay (Setup Time),
80Msps 50% Duty Cycle
Data Latency
The
q
indicates specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. (Note 5)
CONDITIONS
(Note 9)
(Note 8)
(Note 8)
(Note 8)
C
L
= 10pF (Note 8)
C
L
= 10pF (Note 8)
C
L
= 10pF (Note 8)
C
L
= 10pF (Note 8)
(Note 8)
C
L
= 10pF (Note 8)
C
L
= 10pF (Note 8)
(Note 8)
C
L
= 10pF (Note 8)
q
q
q
5.3
6
2.1
5
q
q
q
7.25
2
1.4
q
1
q
q
q
MIN
12.5
6
6
0
2.4
t
1
+ t
4
8.65
4.9
3.4
t
0
– t
6
7.6
10.5
10.25
7.2
4.7
4
TYP
MAX
2000
1000
1000
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
cycles
4
U W
U
U
UW
1749f
LTC1749
ELECTRICAL CHARACTERISTICS
Note 1:
Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2:
All voltage values are with respect to GND (unless otherwise
noted).
Note 3:
When these pin voltages are taken below GND or above V
DD
, they
will be clamped by internal diodes. This product can handle input currents
of greater than 100mA below GND or above V
DD
without latchup.
Note 4:
When these pin voltages are taken below GND, they will be
clamped by internal diodes. This product can handle input currents of
>100mA below GND without latchup. These pins are not clamped to V
DD
.
Note 5:
V
DD
= 5V, f
SAMPLE
= 80MHz, differential ENC/ENC = 2V
P-P
80MHz
sine wave, input range =
±1.125V
differential, unless otherwise specified.
Note 6:
Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve.
The deviation is measured from the center of the quantization band.
Note 7:
Bipolar offset is the offset voltage measured from – 0.5 LSB
when the output code flickers between 0000 0000 0000 and
1111 1111 1111.
Note 8:
Guaranteed by design, not subject to test.
Note 9:
Recommended operating conditions.
TYPICAL PERFOR A CE CHARACTERISTICS
INL
1.0
0.8
0.6
0.4
ERROR (LSB)
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0
0
1024
3072
2048
OUTPUT CODE
4096
1749 G01
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0
0
1024
3072
2048
OUTPUT CODE
4096
1749 G02
AMPLITUDE (dBFS)
ERROR (LSB)
8192 Point FFT, f
IN
= 15MHz,
–10dB, PGA = 0
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
0
5
10
15 20 25 30
FREQUENCY (MHz)
35
40
0
–10
–20
AMPLITUDE (dBFS)
AMPLITUDE (dBFS)
–50
–60
–70
–80
–90
–100
–110
–120
0
5
10
15 20 25 30
FREQUENCY (MHz)
35
40
AMPLITUDE (dBFS)
U W
1749 G04
DNL
1.0
0.8
0.6
0.4
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
8192 Point FFT, f
IN
= 15MHz,
–1dB, PGA = 0
0
5
10
15 20 25 30
FREQUENCY (MHz)
35
40
1749 G03
8192 Point FFT, f
IN
= 15MHz,
–20dB, PGA = 0
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
8192 Point FFT, f
IN
= 30.2MHz,
–1dB, PGA = 0
–30
–40
0
5
10
15 20 25 30
FREQUENCY (MHz)
35
40
1749 G05
1749 G06
1749f
5
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