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LTC2171IUKG-14#TRPBF

Description
4-Channel Quad ADC 40Msps 14-bit Parallel/Serial (SPI)/LVDS 52-Pin QFN EP T/R
File Size1MB,34 Pages
ManufacturerADI
Websitehttps://www.analog.com
Download Datasheet Parametric View All

LTC2171IUKG-14#TRPBF Overview

4-Channel Quad ADC 40Msps 14-bit Parallel/Serial (SPI)/LVDS 52-Pin QFN EP T/R

LTC2171IUKG-14#TRPBF Parametric

Parameter NameAttribute value
EU restricts the use of certain hazardous substancesCompliant
ECCN (US)3A991.c.3
Part StatusActive
HTS8542.39.00.01
Converter TypeGeneral Purpose
Resolution14bit
Number of ADCs4
Number of Input Channels4
Sampling Rate40Msps
Digital Interface TypeSerial (SPI)|Parallel|LVDS
Input TypeVoltage
Input Signal TypeDifferential
Voltage ReferenceExternal|Internal
Voltage Supply SourceSingle
Input Voltage1Vp-p/2Vp-p
Minimum Single Supply Voltage (V)1.7
Typical Single Supply Voltage (V)1.8
Maximum Single Supply Voltage (V)1.9
Typical Power Dissipation (mW)256
Maximum Power Dissipation (mW)293
Integral Nonlinearity Error±2.75LSB
Full Scale Error-2.5/0.5%FSR
Signal to Noise Ratio73.5dBFS(Typ)
No Missing Codes (bit)14
Sample and HoldYes
Single-Ended InputNo
Digital Supply SupportNo
Minimum Operating Temperature (°C)-40
Maximum Operating Temperature (°C)85
PackagingTape and Reel
Supplier Temperature GradeIndustrial
Supplier PackageQFN EP
Pin Count52
Standard Package NameQFN
MountingSurface Mount
Package Height0.75(Max)
Package Length8
Package Width7
PCB changed52
Lead ShapeNo Lead
FeaTures
n
n
n
n
LTC2172-14/
LTC2171-14/LTC2170-14
14-Bit, 65Msps/40Msps/
25Msps Low Power Quad ADCs
DescripTion
The LTC
®
2172-14/LTC2171-14/LTC2170-14 are 4-channel,
simultaneous sampling 14-bit A/D converters designed for
digitizing high frequency, wide dynamic range signals. They
are perfect for demanding communications applications
with AC performance that includes 73.7dB SNR and 90dB
spurious free dynamic range (SFDR). An ultralow jitter of
0.15ps
RMS
allows undersampling of IF frequencies with
excellent noise performance.
DC specifications include ±1LSB INL (typ), ±0.3LSB DNL
(typ) and no missing codes over temperature. The transi-
tion noise is a low 1.2LSB
RMS
.
The digital outputs are serial LVDS to minimize the num-
ber of data lines. Each channel outputs two bits at a time
(2-lane mode) or one bit at a time (1-lane mode). The LVDS
drivers have optional internal termination and adjustable
output levels to ensure clean signal integrity.
The ENC
+
and ENC
inputs may be driven differentially
or single-ended with a sine wave, PECL, LVDS, TTL or
CMOS inputs. An internal clock duty cycle stabilizer al-
lows high performance at full speed for a wide range of
clock duty cycles.
n
n
n
n
n
n
n
n
4-Channel Simultaneous Sampling ADC
73.7dB SNR
90dB SFDR
Low Power: 311mW/202mW/162mW Total,
78mW/51mW/41mW per Channel
Single 1.8V Supply
Serial LVDS Outputs: One or Two Bits per Channel
Selectable Input Ranges: 1V
P-P
to 2V
P-P
800MHz Full Power Bandwidth Sample-and-Hold
Shutdown and Nap Modes
Serial SPI Port for Configuration
Pin-Compatible 14-Bit and 12-Bit Versions
52-Pin (7mm × 8mm) QFN Package
applicaTions
n
n
n
n
n
n
Communications
Cellular Base Stations
Software Defined Radios
Portable Medical Imaging
Multichannel Data Acquisition
Nondestructive Testing
L,
LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
Typical applicaTion
1.8V
V
DD
CHANNEL 1
ANALOG
INPUT
CHANNEL 2
ANALOG
INPUT
CHANNEL 3
ANALOG
INPUT
CHANNEL 4
ANALOG
INPUT
ENCODE
INPUT
S/H
14-BIT
ADC CORE
14-BIT
ADC CORE
14-BIT
ADC CORE
14-BIT
ADC CORE
DATA
SERIALIZER
1.8V
OV
DD
OUT1A
OUT1B
OUT2A
AMPLITUDE (dBFS)
OUT2B
OUT3A
OUT3B
OUT4A
OUT4B
DATA
CLOCK
OUT
FRAME
GND
OGND
217214 TA01
LTC2172-14, 65Msps,
2-Tone FFT, f
IN
= 70MHz and 75MHz
0
–10
–20
–30
–40
–50
–60
–70
–80
SERIALIZED
LVDS
OUTPUTS
S/H
S/H
S/H
–90
–100
–110
–120
PLL
0
20
10
FREQUENCY (MHz)
30
217214 TA01b
21721014fb
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