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LTC2272CUJ#TRPBF

Description
1-Channel Single ADC Pipelined 65Msps 16-bit Serial 40-Pin QFN EP T/R
File Size783KB,44 Pages
ManufacturerADI
Websitehttps://www.analog.com
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LTC2272CUJ#TRPBF Overview

1-Channel Single ADC Pipelined 65Msps 16-bit Serial 40-Pin QFN EP T/R

LTC2272CUJ#TRPBF Parametric

Parameter NameAttribute value
EU restricts the use of certain hazardous substancesCompliant
ECCN (US)3A991.c.4
Part StatusActive
Converter TypeGeneral Purpose
ArchitecturePipelined
Resolution16bit
Number of ADCs1
Number of Input Channels1
Sampling Rate65Msps
Digital Interface TypeSerial
Input TypeVoltage
Input Signal TypeDifferential
Voltage ReferenceExternal|Internal
Voltage Supply SourceSingle
Input Voltage1.5Vp-p/2.25Vp-p
Minimum Single Supply Voltage (V)3.135
Typical Single Supply Voltage (V)3.3
Maximum Single Supply Voltage (V)3.465
Typical Power Dissipation (mW)990
Maximum Power Dissipation (mW)1122
Integral Nonlinearity Error±4.5LSB
Full Scale Error±1.5%FSR
Signal to Noise Ratio77.6dBFS(Typ)
Sample and HoldYes
Single-Ended InputNo
Digital Supply SupportNo
Minimum Operating Temperature (°C)0
Maximum Operating Temperature (°C)70
PackagingTape and Reel
Supplier Temperature GradeCommercial
Pin Count40
Standard Package NameQFN
Supplier PackageQFN EP
MountingSurface Mount
Package Height0.75(Max)
Package Length6
Package Width6
PCB changed40
Lead ShapeNo Lead
FEATURES
n
n
n
n
n
n
n
n
n
n
n
n
LTC2273/LTC2272
16-Bit, 80Msps/65Msps
Serial Output ADC
DESCRIPTION
The LTC
®
2273/LTC2272 are 80Msps/65Msps, 16-bit A/D
converters with a high speed serial interface. They are
designed for digitizing high frequency, wide dynamic
range signals with an input bandwidth of 700MHz. The
input range of the ADC can be optimized using the PGA
front end. The output data is serialized according to the
JEDEC serial interface for data converters specification
(JESD204).
The LTC2273/LTC2272 are perfect for demanding applica-
tions where it is desirable to isolate the sensitive analog
circuits from the noisy digital logic. The AC performance
includes a 77.7dB Noise Floor and 100dB spurious free
dynamic range (SFDR). Ultra low internal jitter of 80fs
RMS allows undersampling of high input frequencies
with excellent noise performance. Maximum DC specs
include ±4.5LSB INL and ±1LSB DNL (no missing codes)
over temperature.
The encode clock inputs, ENC
+
and ENC
, may be driven
differentially or single-ended with a sine wave, PECL,
LVDS, TTL or CMOS inputs. A clock duty cycle stabilizer
allows high performance at full speed with a wide range
of clock duty cycles.
L,
LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
n
High Speed Serial Interface (JESD204)
Sample Rate: 80Msps/65Msps
77.7dBFS Noise Floor
100dB SFDR
SFDR >90dB at 140MHz (1.5V
P-P
Input Range)
PGA Front End (2.25V
P-P
or 1.5V
P-P
Input Range)
700MHz Full Power Bandwidth S/H
Optional Internal Dither
Single 3.3V Supply
Power Dissipation: 1100mW/990mW
Clock Duty Cycle Stabilizer
Pin Compatible Family
105Msps: LTC2274
80Msps: LTC2273
65Msps: LTC2272
40-Pin 6mm
×
6mm QFN Package
APPLICATIONS
n
n
n
n
n
n
Telecommunications
Receivers
Cellular Base Stations
Spectrum Analysis
Imaging Systems
ATE
TYPICAL APPLICATION
3.3V
SENSE
V
CM
1.25V
COMMON MODE
BIAS VOLTAGE
INTERNAL ADC
REFERENCE
GENERATOR
FAM
SYNC
+
8B/10B
ENCODER
16
20
SYNC
OV
DD
1.2V TO 3.3V
0.1μF
50Ω
A
IN +
ANALOG
INPUT
A
IN
ASIC OR FPGA
128k Point FFT, f
IN
= 4.93MHz,
–1dBFS, PGA = 0
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
–130
2.2μF
50Ω
AMPLITUDE (dBFS)
CMLOUT
+
+
SERIAL
RECEIVER
+
S/H
AMP
CLOCK
CLOCK/DUTY
CYCLE
CONTROL
ENC
+
ENC
16-BIT
PIPELINED
ADC CORE
SERIALIZER
CORRECTION
LOGIC
CMLOUT
SCRAMBLER/
PATTERN
GENERATOR
PGA DITH MSBINV SHDN
20X
PLL
GND
V
DD
3.3V
0.1μF
0.1μF
22732 TA01
0
10
20
30
FREQUENCY (MHz)
40
22732
G04
PAT1 PAT0 SCRAM SRR1 SRR0
22732fa
1

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EU restricts the use of certain hazardous substances Compliant Compliant Compliant Compliant Compliant Compliant Compliant Compliant
ECCN (US) 3A991.c.4 3A991.c.4 3A991.c.4 3A991.c.4 3A001.a.5.a.5 3A001.a.5.a.5 3A001.a.5.a.5 3A001.a.5.a.5
Part Status Active Active Active Active Active Active Active Active
Converter Type General Purpose General Purpose General Purpose General Purpose General Purpose General Purpose General Purpose General Purpose
Architecture Pipelined Pipelined Pipelined Pipelined Pipelined Pipelined Pipelined Pipelined
Resolution 16bit 16bit 16bit 16bit 16bit 16bit 16bit 16bit
Number of ADCs 1 1 1 1 1 1 1 1
Number of Input Channels 1 1 1 1 1 1 1 1
Sampling Rate 65Msps 65Msps 65Msps 65Msps 80Msps 80Msps 80Msps 80Msps
Digital Interface Type Serial Serial Serial Serial Serial Serial Serial Serial
Input Type Voltage Voltage Voltage Voltage Voltage Voltage Voltage Voltage
Input Signal Type Differential Differential Differential Differential Differential Differential Differential Differential
Voltage Reference External|Internal Internal|External Internal|External External|Internal Internal|External External|Internal External|Internal External|Internal
Voltage Supply Source Single Single Single Single Single Single Single Single
Input Voltage 1.5Vp-p/2.25Vp-p 1.5Vp-p/2.25Vp-p 1.5Vp-p/2.25Vp-p 1.5Vp-p/2.25Vp-p 1.5Vp-p/2.25Vp-p 1.5Vp-p/2.25Vp-p 1.5Vp-p/2.25Vp-p 1.5Vp-p/2.25Vp-p
Minimum Single Supply Voltage (V) 3.135 3.135 3.135 3.135 3.135 3.135 3.135 3.135
Typical Single Supply Voltage (V) 3.3 3.3 3.3 3.3 3.3 3.3 3.3 3.3
Maximum Single Supply Voltage (V) 3.465 3.465 3.465 3.465 3.465 3.465 3.465 3.465
Typical Power Dissipation (mW) 990 990 990 990 1100 1100 1100 1100
Maximum Power Dissipation (mW) 1122 1122 1122 1122 1221 1221 1221 1221
Integral Nonlinearity Error ±4.5LSB ±4.5LSB ±4.5LSB ±4.5LSB ±4.5LSB ±4.5LSB ±4.5LSB ±4.5LSB
Full Scale Error ±1.5%FSR ±1.5%FSR ±1.5%FSR ±1.5%FSR ±1.5%FSR ±1.5%FSR ±1.5%FSR ±1.5%FSR
Signal to Noise Ratio 77.6dBFS(Typ) 77.6dBFS(Typ) 77.6dBFS(Typ) 77.6dBFS(Typ) 77.6dBFS(Typ) 77.6dBFS(Typ) 77.6dBFS(Typ) 77.6dBFS(Typ)
Sample and Hold Yes Yes Yes Yes Yes Yes Yes Yes
Single-Ended Input No No No No No No No No
Digital Supply Support No No No No No No No No
Maximum Operating Temperature (°C) 70 70 85 85 70 70 85 85
Packaging Tape and Reel Tube Tube Tape and Reel Tube Tape and Reel Tube Tape and Reel
Supplier Temperature Grade Commercial Commercial Industrial Industrial Commercial Commercial Industrial Industrial
Pin Count 40 40 40 40 40 40 40 40
Standard Package Name QFN QFN QFN QFN QFN QFN QFN QFN
Supplier Package QFN EP QFN EP QFN EP QFN EP QFN EP QFN EP QFN EP QFN EP
Mounting Surface Mount Surface Mount Surface Mount Surface Mount Surface Mount Surface Mount Surface Mount Surface Mount
Package Height 0.75(Max) 0.75(Max) 0.75(Max) 0.75(Max) 0.75(Max) 0.75(Max) 0.75(Max) 0.75(Max)
Package Length 6 6 6 6 6 6 6 6
Package Width 6 6 6 6 6 6 6 6
PCB changed 40 40 40 40 40 40 40 40
Lead Shape No Lead No Lead No Lead No Lead No Lead No Lead No Lead No Lead
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Index Files: 1241  1535  2274  1531  1045  25  31  46  22  51 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
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