EEWORLDEEWORLDEEWORLD

Part Number

Search

LTC2655IUF-L12#TRPBF

Description
DAC 4-CH 12-bit Automotive 20-Pin PQFN EP T/R
File Size364KB,28 Pages
ManufacturerADI
Websitehttps://www.analog.com
Download Datasheet Parametric View All

LTC2655IUF-L12#TRPBF Overview

DAC 4-CH 12-bit Automotive 20-Pin PQFN EP T/R

LTC2655IUF-L12#TRPBF Parametric

Parameter NameAttribute value
EU restricts the use of certain hazardous substancesCompliant
ECCN (US)EAR99
Part StatusActive
Converter TypeGeneral Purpose
Resolution12bit
Number of DAC Channels4
Number of Outputs per Chip4
Maximum Settling Time (us)3.9(Typ)
Digital Interface TypeSerial (2-Wire, I2C)
Output TypeVoltage
Output PolarityUnipolar
Voltage ReferenceExternal|Internal
Minimum Single Supply Voltage (V)2.7
Typical Single Supply Voltage (V)5|3.3
Maximum Single Supply Voltage (V)5.5
Power Supply TypeSingle
Maximum Power Dissipation (mW)5.1(Typ)
Integral Nonlinearity Error±1LSB
Full Scale Error±0.1%FSR
Digital Supply SupportNo
Minimum Operating Temperature (°C)-40
Maximum Operating Temperature (°C)85
PackagingTape and Reel
Supplier Temperature GradeIndustrial
Pin Count20
Standard Package NameQFN
Supplier PackagePQFN EP
MountingSurface Mount
Package Height0.75(Max)
Package Length4
Package Width4
PCB changed20
Lead ShapeNo Lead
FEATURES
n
n
n
n
n
n
n
n
n
n
LTC2655
Quad I
2
C 16-/12-Bit
Rail-to-Rail DACs with
10ppm/°C Max Reference
DESCRIPTION
The LTC
®
2655 is a family of Quad I
2
C 16-/12-Bit Rail-to-
Rail DACs with integrated 10ppm/°C max reference. The
DACs have built-in high performance, rail-to-rail, output
buffers and are guaranteed monotonic. The LTC2655-L
has a full-scale output of 2.5V with the integrated refer-
ence and operates from a single 2.7V to 5.5V supply.
The LTC2655-H has a full-scale output of 4.096V with
the integrated reference and operates from a 4.5V to
5.5V supply. Each DAC can also operate with an external
reference, which sets the full-scale output to 2 times the
external reference voltage.
The parts use the 2-wire I
2
C compatible serial interface.
The LTC2655 operates in both the standard mode (maxi-
mum clock rate of 100kHz) and the fast mode (maximum
clock rate of 400kHz). The LTC2655 incorporates a
power-on reset circuit that is controlled by the PORSEL
pin. If PORSEL is tied to GND the DACs power-on reset to
zero-scale. If PORSEL is tied to V
CC
, the DACs power-on
reset to mid-scale.
L,
LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
Protected by U.S. Patents including 5396245, 6891433 and 7671770.
Integrated Reference 10ppm/°C Max
Maximum INL Error: ±4LSB at 16 Bits
Guaranteed Monotonic Over Temperature
Selectable Internal or External Reference
2.7V to 5.5V Supply Range (LTC2655-L)
Integrated Reference Buffers
Ultralow Crosstalk Between DACs (<1nV•s)
Power-On-Reset to Zero-Scale/Mid-Scale
Asynchronous DAC Update Pin
Tiny 20-Lead 4mm
×
4mm QFN and
16-Lead Narrow SSOP packages
APPLICATIONS
n
n
n
n
n
Mobile Communications
Process Control and Industrial Automation
Instrumentation
Automatic Test Equipment
Automotive
BLOCK DIAGRAM
REFCOMP
GND
REFLO
REGISTER
REGISTER
REGISTER
REGISTER
V
OUTA
DAC A
DAC D
V
OUTD
INL (LSB)
INTERNAL REFERENCE
REFIN/OUT
INL Curve
V
CC
4
3
2
1
0
–1
DAC C
V
OUTC
–2
–3
POWER-ON
RESET
PORSEL
–4
128
16384
32768
CODE
49152
65535
2655 TA01b
V
CC
= 5V
REGISTER
REGISTER
REGISTER
V
OUTB
CA0
CA1
DAC B
32-BIT SHIFT REGISTER
CA2
SCL
LDAC
2-WIRE INTERFACE
REGISTER
SDA
2655 BD
2655f
1
Let's talk about the analysis of C++ constructors and destructors
When creating an object, it is often necessary to do some initialization work, such as assigning initial values to data members. Note that data members of a class cannot be initialized when declaring ...
Jacktang Microcontroller MCU
Medium Voltage Power Line Communication Technology
Author: Qiu Ben, Wang Jianshan, Xiuming, Department of Electronic Engineering, Tsinghua University Readings: 69 Citations: 0 Published on: 2006-08-09 10:44 Source: Electronics WorldAbstract: This pape...
fighting Industrial Control Electronics
ucosiii—OSSchedLock() function question! Help! Thank you!
[b]I wrote a piece of ucosiii code[/b] [b]The code expects two lights to flash alternately, but it does not happen. Why? [/b] [b]This function: BSP_LED_Toggle(); performs the inversion operation. [/b]...
syw828 Real-time operating system RTOS
Can the PLL output be connected to a normal IO port by setting global clock constraints?
I am doing a course design recently. When reading sdram, I use pll to multiply the frequency to generate sdram clock (100M). However, I found that the sdram interface of the board at hand is a common ...
seaundersky FPGA/CPLD
Digital timer
This is a digital timer used on the test bench. Take it apart and see what the internal structure is like. It is actually quite simple. The key component is the circuit board, as shown below...
shakencity Making friends through disassembly
Collection of popular domestic chip data downloads
GigaDevice GD32 Design Competition Selected Works Album https://download.eeworld.com.cn/wenji/show/427GD32F130 Chinese Manual https://download.eeworld.com.cn/detail/yjwerxx/558600National Technology-N...
arui1999 Download Centre

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 986  2054  2192  2580  885  20  42  45  52  18 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号