LY62L204916AGL-70SLT datasheet, PDF

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LY62L204916AGL-70SLT: Description2048K X 16 BIT LOW POWER CMOS SRAM; Categorystorage storage; File Size363KB，12 Pages; ManufacturerLyontek; Websitehttp://www.lyontek.com.tw/index.html; Environmental Compliance

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LY62L204916AGL-70SLT Overview

2048K X 16 BIT LOW POWER CMOS SRAM

LY62L204916AGL-70SLT Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	Lyontek
package instruction	LFBGA,
Reach Compliance Code	compliant
Maximum access time	70 ns
JESD-30 code	R-PBGA-B48
length	10 mm
memory density	33554432 bit
Memory IC Type	STANDARD SRAM
memory width	16
Number of functions	1
Number of terminals	48
word count	2097152 words
character code	2000000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	2MX16
Package body material	PLASTIC/EPOXY
encapsulated code	LFBGA
Package shape	RECTANGULAR
Package form	GRID ARRAY, LOW PROFILE, FINE PITCH
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
Maximum seat height	1.4 mm
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	2.7 V
Nominal supply voltage (Vsup)	3 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal form	BALL
Terminal pitch	0.75 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	NOT SPECIFIED
width	8 mm
Base Number Matches	1

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LY62L204916A

Rev.1.2

2048K X 16 BIT LOW POWER CMOS SRAM

REVISION HISTORY

Revision

Rev. 1.0

Rev. 1.1

Rev. 1.2

Description

Initial Issue

Typo error on page 9, revised as 8mmx10mm.

1. Revise I

SB1

on page 4

on page 8

2. Revise VIH(max) & VIL(min) note on page 4

VIH(max) = VCC + 2.0V for pulse width less than 6ns.

VIL(min) = VSS - 2.0V for pulse width less than 6ns.

Issue Date

Nov. 06. 2012

Dec.18. 2012

June. 10. 2013

Lyontek Inc.

reserves the rights to change the specifications and products without notice.

5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.

TEL: 886-3-6668838

FAX: 886-3-6668836

LY62L204916AGL-70SLT Related Products

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Description	2048K X 16 BIT LOW POWER CMOS SRAM	2048K X 16 BIT LOW POWER CMOS SRAM	2048K X 16 BIT LOW POWER CMOS SRAM	2048K X 16 BIT LOW POWER CMOS SRAM	2048K X 16 BIT LOW POWER CMOS SRAM	2048K X 16 BIT LOW POWER CMOS SRAM	2048K X 16 BIT LOW POWER CMOS SRAM	2048K X 16 BIT LOW POWER CMOS SRAM
Is it Rohs certified?	conform to	conform to	conform to	conform to	conform to	conform to	-	conform to
Maker	Lyontek	Lyontek	Lyontek	Lyontek	Lyontek	Lyontek	-	Lyontek
package instruction	LFBGA,	TFBGA-48	LFBGA,	TFBGA-48	TFBGA-48	TFBGA-48	-	TFBGA-48
Reach Compliance Code	compliant	compliant	compliant	compliant	compliant	compliant	-	compliant
Maximum access time	70 ns	55 ns	55 ns	70 ns	70 ns	55 ns	-	70 ns
JESD-30 code	R-PBGA-B48	R-PBGA-B48	R-PBGA-B48	R-PBGA-B48	R-PBGA-B48	R-PBGA-B48	-	R-PBGA-B48
length	10 mm	10 mm	10 mm	10 mm	10 mm	10 mm	-	10 mm
memory density	33554432 bit	33554432 bit	33554432 bit	33554432 bit	33554432 bit	33554432 bit	-	33554432 bit
Memory IC Type	STANDARD SRAM	STANDARD SRAM	STANDARD SRAM	STANDARD SRAM	STANDARD SRAM	STANDARD SRAM	-	STANDARD SRAM
memory width	16	16	16	16	16	16	-	16
Number of functions	1	1	1	1	1	1	-	1
Number of terminals	48	48	48	48	48	48	-	48
word count	2097152 words	2097152 words	2097152 words	2097152 words	2097152 words	2097152 words	-	2097152 words
character code	2000000	2000000	2000000	2000000	2000000	2000000	-	2000000
Operating mode	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	-	ASYNCHRONOUS
Maximum operating temperature	70 °C	70 °C	70 °C	85 °C	85 °C	85 °C	-	70 °C
organize	2MX16	2MX16	2MX16	2MX16	2MX16	2MX16	-	2MX16
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	-	PLASTIC/EPOXY
encapsulated code	LFBGA	LFBGA	LFBGA	LFBGA	LFBGA	LFBGA	-	LFBGA
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	-	RECTANGULAR
Package form	GRID ARRAY, LOW PROFILE, FINE PITCH	GRID ARRAY, LOW PROFILE, FINE PITCH	GRID ARRAY, LOW PROFILE, FINE PITCH	GRID ARRAY, LOW PROFILE, FINE PITCH	GRID ARRAY, LOW PROFILE, FINE PITCH	GRID ARRAY, LOW PROFILE, FINE PITCH	-	GRID ARRAY, LOW PROFILE, FINE PITCH
Parallel/Serial	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	-	PARALLEL
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	-	NOT SPECIFIED
Maximum seat height	1.4 mm	1.4 mm	1.4 mm	1.4 mm	1.4 mm	1.4 mm	-	1.4 mm
Maximum supply voltage (Vsup)	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	-	3.6 V
Minimum supply voltage (Vsup)	2.7 V	2.7 V	2.7 V	2.7 V	2.7 V	2.7 V	-	2.7 V
Nominal supply voltage (Vsup)	3 V	3 V	3 V	3 V	3 V	3 V	-	3 V
surface mount	YES	YES	YES	YES	YES	YES	-	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	-	CMOS
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	-	COMMERCIAL
Terminal form	BALL	BALL	BALL	BALL	BALL	BALL	-	BALL
Terminal pitch	0.75 mm	0.75 mm	0.75 mm	0.75 mm	0.75 mm	0.75 mm	-	0.75 mm
Terminal location	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM	-	BOTTOM
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	-	NOT SPECIFIED
width	8 mm	8 mm	8 mm	8 mm	8 mm	8 mm	-	8 mm
Base Number Matches	1	1	1	1	1	1	-	1

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