NOIM1SM9600A,
NOIM2SM9600A
Advance Information
MANO 9600 9.6 MegaPixel
Rolling Shutter CMOS
Image Sensor
Features
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9.6 MegaPixel Resolution in 3840
×
2500 Format
2.4
mm
×
2.4
mm
Square Pixels (Shared 4T Pixel Architecture)
2/3 inch Optical Format
Monochrome (SM) Version
20 Frames per Second (fps) at Full Resolution
200 mW / 500 mW Power Consumption at 5 fps / 20 fps
Four Low−Voltage Differential Signaling (LVDS) High Speed Serial
Outputs or One 10−bit CMOS Output
On-chip 10-bit Analog-to-Digital Converter (ADC)
Windowing to Attain Higher Frame Rate
Rolling Shutter
On-chip Fixed Pattern Noise (FPN) Correction
Serial Peripheral Interface (SPI)
Automatic Exposure Control (AEC)
Phase Locked Loop (PLL)
Figure 1. MANO 9600 Package Photograph
High Dynamic Range (HDR)
Dual Power Supply (1.8 V and 3.3 V)
Applications
0°C to 70°C Operational Temperature Range
•
Biometrics (Fingerprinting)
52-pin LCC
•
Machine Vision
500 mW Power Dissipation (LVDS)
•
Inspection
200 mW Power Dissipation (CMOS)
•
Microscopy
These Devices are Pb−Free and are RoHS Compliant
Description
The MANO9600 is a rolling shutter CMOS image sensor with a resolution of 3840 x 2500 pixels.
The high sensitivity 2.4
mm
x 2.4
mm
pixels supports correlated double sampling readout reducing noise and increasing
dynamic range.
A high level of programmability using a four wire serial peripheral interface enables the user to read out specific regions
of interest.
Higher frame rates are achieved with region of interest or sub−sampled readout modes. The sensor has built−in features for
bias control and power supply regulation.
The sensor has on−chip programmable gain amplifiers and 10−bit A/D converters. The integration time and gain parameters
can be reconfigured without any visible image artifact. Optionally the on−chip automatic exposure control loop (AEC) controls
these parameters dynamically. The image’s black level is either calibrated automatically or can be adjusted by adding a user
programmable offset.
The image data interface of the M1−SM part consists of four LVDS lanes running at 620 Mbps, facilitating frame rates up
to 20 frames per second. A separate synchronization and clock channel containing payload information is provided to facilitate
the image reconstruction at the receive end. The M2−SM part provides a parallel CMOS output interface at reduced frame rate
of 5 frames per second.
The MANO 9600 is packaged in a 52−pin LCC package and is available in a monochrome without micro lens.
Contact your local ON Semiconductor office for more information.
This document contains information on a new product. Specifications and information herein are subject to change without notice.
©
Semiconductor Components Industries, LLC, 2014
February, 2014
−
Rev. P0
1
Publication Order Number:
NOIM1SM9600A/D
NOIM1SM9600A, NOIM2SM9600A
ORDERING INFORMATION
Part Number
NOIM1SM9600A-QDC
NOIM2SM9600A-QDC
Description
LVDS Interface mono
CMOS Interface mono
Package
52−pin LCC package
The M1-SM base part is used to reference the mono version of the LVDS interface; the M2-SM base part is used to reference
the mono version of the CMOS interface.
NOTE: The MANO 9600 does not utilize a micro lens.
ORDERING CODE DEFINITION
N O I M1 S M 9600 A
−
Q D C
ON Semiconductor
Opto
Image Sensors
M1: MANO LVDS
M2: MANO CMOS
S: Standard Process
M = Mono (no microlens)
PACKAGE MARK
Following is the mark on the bottom side of the package with Pin 1 to the left center
Line 1:
NOI xx SM9600A
where xx denotes LVDS (M1) / CMOS (M2)
Line 2:
-QDC
Line 3:
AWLYYWW;
where line 3 is the lot traceability as shown below
Commercial Temperature Range
D = D263 Glass
Package Q = LCC
Additional Functionality
9.6 MegaPixel Resolution
XXXXX
A
WL
YY
WW
NNNN
= Specific Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Serial Number
Figure 2. Generic Package Mark
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NOIM1SM9600A, NOIM2SM9600A
CONTENTS
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . 2
Ordering Code Definition . . . . . . . . . . . . . . . . . . . . . . 2
Package Mark . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Operating Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Sensor Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Additional Features . . . . . . . . . . . . . . . . . . . . . . . . . . .
Data Output Format . . . . . . . . . . . . . . . . . . . . . . . . . .
Register Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package Information . . . . . . . . . . . . . . . . . . . . . . . . . .
Glass Lid . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Handling Precautions . . . . . . . . . . . . . . . . . . . . . . . . .
Limited Warranty . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Specifications and User References . . . . . . . . . . . . . .
Acronyms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Glossary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
25
31
44
56
62
63
63
63
64
65
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NOIM1SM9600A, NOIM2SM9600A
SPECIFICATIONS
Key Specifications
Table 1. GENERAL SPECIFICATIONS
Parameter
Active pixels
Pixel size
Shutter type
Master clock
3840 x 2500
2.4
mm
x 2.4
mm
(Shared 4T pixel architecture)
Rolling shutter
M1-SM:
62 MHz when PLL is used,
310 MHz (10-bit) / 248 MHz (8-bit)
when PLL is not used
M2-SM: 62 MHz
10-bit, 8-bit
M1-SM: 4 data + sync + clock
M2-SM: 10-bit parallel output,
frame_valid, line_valid, clock
M1-SM:
4 x 620 Mbps (10-bit) /
4 x 496 Mbps (8-bit)
M2-SM: 62 MHz
M1−SM in 10−bit mode:
700 mW at 20 fps frame rate
M2−SM: 540 mW at 5 fps frame rate
52-pin LCC
Specification
Table 2. ELECTRO−OPTICAL SPECIFICATIONS
Parameter
Frame rate
at full resolution
Optical format
Conversion gain
Dark noise
Responsivity at 550 nm
Full well charge
QE x FF
Pixel FPN
Row FPN
Column FPN
PRNU
Dark signal
Dynamic range
Signal to Noise Ratio
(SNR)
Specification
M1−SM: 20 fps
M2−SM: 5 fps
2/3 inch
0.072 LSB10/e
-
56
mV/e
-
1.5 LSB10,
21 e
-
4 LSB10 /nJ/cm
2
13500 e
-
40% at 550 nm
1.3 LSB10
0.07 LSB10
1.3 LSB10
< 4% of signal
13.8 e
-
/s @ 25°C,
2.4 LSB10/s at +24°C
54 dB
40 dB
ADC resolution
LVDS outputs
CMOS outputs
Data rate
Power dissipation
Package type
Table 3. RECOMMENDED OPERATING RATINGS
(Note 1)
Symbol
T
J
(Note 2)
Description
Operating temperature range
Min
0
Max
70
Units
°C
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
Table 4. ABSOLUTE MAXIMUM RATINGS
(Notes 2 and 3)
Symbol
ABS (1.8 V supply group)
ABS (3.3 V supply group)
T
S
Electrostatic discharge (ESD)
Parameter
ABS rating for 1.8 V supply group
ABS rating for 3.3 V supply group
ABS storage temperature range
ABS storage humidity range at 85°C
Human Body Model (HBM): JS−001−2010
Charged Device Model (CDM): JESD22−C101
LU
Latch-up: JESD−78
2000
500
200
mA
Min
–0.5
–0.5
0
Max
2.25
4.3
150
85
Units
V
V
°C
%RH
V
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Operating ratings are conditions in which operation of the device is intended to be functional.
2. Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade
device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified
is not implied.
3. ON Semiconductor recommends that customers become familiar with, and follow the procedures in JEDEC Standard JESD625−A. Refer
to Application Note AN52561.
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NOIM1SM9600A, NOIM2SM9600A
Table 5. ELECTRICAL SPECIFICATIONS
Boldface limits apply for T
J
= T
MIN
to T
MAX
, all other limits T
J
= +30°C. (Notes 4, 5, 6 and 7)
Parameter
Power Supply Parameters
Vdd_33
Vdd_18
Vdd_pix
Idd_pix
Ptot_20fps/5fps
Pstby
Pstby_lp
Popt
fpardata
Cout
tr
tf
fserdata
fserclock
Vicm
Tccsk
fin
tidc
tj
fspi
ratspi
fps
fps_roi1
fps_roi2
fps_roi3
fps_roi4
fps_roi5
fps_roi6
ROT
fpix
fpardata
Supply voltage, 3.3 V
Supply voltage, 1.8 V
Supply voltage, pixel
Current consumption pixel supply
Total power consumption at 20 fps / 5 fps
Power consumption in standby mode
Power consumption in low power standby mode
Power consumption at lower pixel rates
Data rate on parallel channels
Output load
Rise time
Fall time
Data rate on data channels for 20 fps / 5 fps
Clock rate of output clock for 20 fps / 5 fps
LVDS input common mode level
Channel to channel skew
Input clock rate for 20 fps / 5 fps
Input clock duty cycle
Input clock jitter
SPI clock rate for 20 / 5 fps
Ratio: Fin/fspi
Frame rate at full resolution (CMOS / LVDS)
Xres x Yres = 3334 x 2500
Xres x Yres = 3840 x 2160
Xres x Yres = 1024 x 1024
Xres x Yres = 640 x 480
Xres x Yres = 512 x 512
Xres x Yres = 256 x 256
Row Overhead Time at 20 / 5 fps
Pixel rate minimum at 5 fps, maximum at 20 fps
Data rate on parallel channels
60
1.55 / 6.4
248
62
6
5 / 20
5.8 / 24
6 / 25
32 / 135
88 / 366
91 / 377
227 / 942
fps
fps
fps
fps
fps
fps
fps
ms
Mpix/s
fps
45
50
20
10 / 2.5
0.3
3
2.5
4.5
3.5
620 / 150
310 / 75
1.25
2.2
50
62 / 15
55
Configurable
62
10
6
5
Mbps
pF
ns
ns
Mbps
MHz
V
ps
MHz
%
ps
MHz
3.1
1.6
3.1
0.8
3.3
1.8
3.3
1
700 / 540
50
10
3.6
2
3.6
1.2
V
V
V
mA
mW
mW
mW
Description
Min
Typ
Max
Units
I/O - LVCMOS (JEDEC- JESD8C-01) - Conforming to standard - additional specifications and deviations listed
I/O - LVDS (EIA/TIA-644) - Conforming to standard - additional specifications and deviations listed
Electrical/Interface
Sensor Requirements
I/O - LVCMOS (JEDEC - JESD8C-01) - Conforming to standard - additional specifications and deviations listed
4. All parameters are characterized for DC conditions after thermal equilibrium is established.
5. This device contains circuitry to protect the inputs against damage due to high static voltages or electric fields. However, it is recommended
that normal precautions be taken to avoid application of any voltages higher than the maximum rated voltages to this high impedance circuit.
6. Minimum and maximum limits are guaranteed through test and design.
7. For recommendations on power supply management guidelines, refer to Application Note AN65464: VITA 2000 HSMC Cyclone Reference
Board Design Recommendations.
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