PO74G304A
3.3V 1:4 CMOS Clock Buffered Driver
700MHz TTL/CMOS Potato Chip
07/31/06
FEATURES:
• Patented technology
• Operating frequency up to 700MHz with 2pf load
• Operating frequency up to 650MHz with 5pf load
• Operating frequency up to 450MHz with 15pf load
• Operating frequency up to 100MHz with 50pf load
• Very low output pin to pin skew < 100ps
• Very low pulse skew < 150ps
• VCC = 1.65V to 3.6V
• Propagation delay < 2.1ns max with 15pf load
• Low input capacitance: 3pf typical
• 1:4 fanout
• Packaging (Pb-free & Green available)
• Available in 8-pin TSSOP package
DESCRIPTION:
Potato Semiconductor’s PO74G304A is designed for
world top performance using submicron CMOS technol-
ogy to achieve 700MHz TTL output frequency with less
than 100ps output pin to pin skew.
PO74G304A is a 3.3V CMOS 1 input to 4 outputs
Buffered driver to achieve 700MHz output frequency.
Typical applications are clock and signal distribution.
They are used for networking and communications
applications.
Inputs can be driven from either 3.3V or 5V devices.
This feature allows the use of these devices as translators
in a mixed 3.3V/5V system environment.
Pin Configuration
Logic Block Diagram
Y0
CLK_IN
OE
Y0
GND
1
2
3
4
8
7
6
5
Y3
Y2
VDD
Y1
OE
CLK_IN
Y3
Y1
Y2
Pin Description
Pin#
1
2
3,5,7,8
4
6
De s cription
5V Tolerant clock input
Active High Output Enable.
LVCMOS level outputs
Groun
3.3V powe
FUNCTION TABLE
INPUTS
CLKIN
OE
OUTPUT
1Y (0:3)
L
H
L
H
L
L
H
H
L
L
L
H
1
Copyright
© 2005-2006, Potato Semiconductor Corporation
PO74G304A
3.3V 1:4 CMOS Clock Buffered Driver
700MHz TTL/CMOS Potato Chip
07/31/06
Maximum Ratings
Description
Storage Temperature
Operation Temperature
Operation Voltage
Input Voltage
Output Voltage
Max
-65 to 150
-40 to 85
-0.5 to +4.6
-0.5 to +5.5
-0.5 to Vcc+0.5
Unit
°C
°C
V
V
V
Note:
stresses greater than listed under
Maximum
Ratings
may
cause
permanent damage to the device. This
is a stress rating only and functional
operation of the device at these or any
other conditions above those indicated
in the operational sections of this
specification is not implied. Exposure
to absolute maximum rating conditions
for extended periods may affect
reliability specification is not implied.
DC Electrical Characteristics
Symbol
Description
Output High voltage
Output Low voltage
Input High voltage
Input Low voltage
Input High current
Input Low current
Clamp diode voltage
Test Conditions
Vcc=3V Vin=V
IH
or V
IL
, I
OH
= -12mA
Vcc=3V Vin=V
IH
or V
IL
, I
OH
=12mA
Guaranteed Logic HIGH Level (Input Pin)
Guaranteed Logic LOW Level (Input Pin)
Vcc = 3.6V and Vin = 5.5V
Vcc = 3.6V and Vin = 0V
Vcc = Min. And
I
IN
= -18mA
Min
Typ
Max
Unit
V
OH
V
OL
V
IH
V
IL
I
IH
I
IL
V
IK
Notes:
1.
2.
3.
4.
5.
2.4
-
2
-0.5
-
-
-
3
0.4
-
-
-
-
-0.7
-
0.5
5.5
0.8
50
-50
-1.2
V
V
V
V
uA
uA
V
For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
Typical values are at Vcc = 3.3V, 25
°C
ambient.
This parameter is guaranteed but not tested.
Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
VoH = Vcc – 0.6V at rated current
2
Copyright
© 2005-2006, Potato Semiconductor Corporation
PO74G304A
3.3V 1:4 CMOS Clock Buffered Driver
700MHz TTL/CMOS Potato Chip
07/31/06
Power Supply Characteristics
Symbol
Description
Quiescent Power Supply Current
Power Supply Current per Input High
Test Conditions (1)
Vcc=Max, Vin=Vcc or GND
Vcc=Max, Vin= Vcc-0.6V
Min
Typ
Max
Unit
Icc
Q
∆Icc
Notes:
1.
2.
3.
4.
5.
-
-
0.1
50
30
300
uA
uA
For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
Typical values are at Vcc = 3.3V, 25°C ambient.
This parameter is guaranteed but not tested.
Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
VoH = Vcc – 0.6V at rated current
Capacitance
Parameters (1)
Description
Input Capacitance
Output Capacitance
Test Conditions
Vin = 0V
Vout = 0V
Typ
Max
Unit
Cin
Cout
Notes:
3
-
4
6
pF
pF
1 This parameter is determined by device characterization but not production tested.
Switching Characteristics
Symbol
Description
Propagation Delay A to Bn
Propagation Delay A to Bn
Rise/Fall Time
Pulse Skew (Same Package)
Output Pin to Pin Skew (Same Package)
Output Skew (Different Package)
Input Frequency
Input Frequency
Input Frequency
Input Frequency
Test Conditions (1)
CL = 15pF
CL = 15pF
0.8V – 2.0V
CL = 15pF, 125MHz
CL = 15pF, 125MHz
CL = 15pF, 125MHz
CL = 50pF
CL =15pF
CL = 5pF
CL = 2pF
M ax
Unit
t
PLH
t
PHL
tr/tf
tsk(p)
tsk(o)
tsk(pp)
fmax
fmax
fmax
fmax
Notes:
2.1
2.1
0.8
150
100
400
100
450
650
700
ns
ns
ns
ps
ps
ps
MHz
MHz
MHz
MHz
1. See test circuits and waveforms.
2. tpLH, tpHL, tsk(p), and tsk(o) are production tested. All other parameters guaranteed but not production tested.
3. Airflow of 1m/s is recommended for frequencies above 133MHz
3
Copyright
© 2005-2006, Potato Semiconductor Corporation
PO74G304A
3.3V 1:4 CMOS Clock Buffered Driver
700MHz TTL/CMOS Potato Chip
07/31/06
Test Waveforms
Test Circuit
50
Ω
4
Copyright
© 2005-2006, Potato Semiconductor Corporation
PO74G304A
3.3V 1:4 CMOS Clock Buffered Driver
700MHz TTL/CMOS Potato Chip
07/31/06
Packaging Mechanical Drawing: 8 pin TSSOP
8
SEATING PLANE
X.XX
DENOTES DIMENSIONS
X.XX
IN MILLIMETERS
5
Copyright
© 2005-2006, Potato Semiconductor Corporation
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