IRF840LCS, IRF840LCL, SiHF840LCS, SiHF840LCL
Vishay Siliconix
Power MOSFET
PRODUCT SUMMARY
V
DS
(V)
R
DS(on)
()
Q
g
(Max.) (nC)
Q
gs
(nC)
Q
gd
(nC)
Configuration
V
GS
= 10 V
39
10
19
Single
D
FEATURES
500
0.85
•
Halogen-free According to IEC 61249-2-21
Definition
• Ultra Low Gate Charge
• Reduced Gate Drive Requirement
• Enhanced 30 V V
GS
Rating
• Reduced C
iss
, C
oss
, C
rss
• Extremely High Frequency Operation
• Repetitive Avalanche Rated
• Compliant to RoHS Directive 2002/95/EC
DESCRIPTION
I
2
PAK
(TO-262)
D
2
PAK (TO-263)
G
G
D
S
G
D
S
S
N-Channel MOSFET
This new series of low charge Power MOSFETs achieve
significantly lower gate charge then conventional Power
MOSFETs. Utilizing the new LCDMOS (low charge device
Power MOSFETs) technology, the device improvements are
achieved without added product cost, allowing for reduced
gate drive requirements and total system savings. In
addition, reduced switching losses and improved efficiency
are achievable in a variety of high frequency applications.
Frequencies of a few MHz at high current are possible using
the new low charge Power MOSFETs.
These device improvements combined with the proven
ruggedness and reliability that characterize Power
MOSFETs offer the designer a new power transistor
standard for switching applications.
I
2
PAK (TO-262)
SiHF840LCL-GE3
IRF840LCLPbF
SiHF840LCL-E3
ORDERING INFORMATION
Package
Lead (Pb)-free and Halogen-free
Lead (Pb)-free
Note
a. See device orientation.
D
2
PAK (TO-263)
SiHF840LCS-GE3
IRF840LCSPbF
SiHF840LCS-E3
ABSOLUTE MAXIMUM RATINGS
(T
C
= 25 °C, unless otherwise noted)
PARAMETER
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
Pulsed Drain
Linear Derating Factor
Single Pulse Avalanche Energy
b, e
Avalanche Current
a
Repetiitive Avalanche Energy
a
Maximum Power Dissipation
Peak Diode Recovery dV/dt
c, e
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)
T
C
= 25 °C
T
A
= 25 °C
Current
a, e
V
GS
at 10 V
T
C
= 25 °C
T
C
= 100 °C
SYMBOL
V
DS
V
GS
I
D
I
DM
E
AS
I
AR
E
AR
P
D
dV/dt
T
J
, T
stg
for 10 s
LIMIT
500
± 30
8.0
5.1
28
1.0
510
8.0
13
125
3.1
3.5
- 55 to + 150
300
d
UNIT
V
A
W/°C
mJ
A
mJ
W
V/ns
°C
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Starting T
J
= 25 °C, L = 14 mH, R
g
= 25
,
I
AS
= 8.0 A (see fig. 12).
c. I
SD
8.0 A, dI/dt
100 A/μs, V
DD
V
DS
, T
J
150 °C.
d. 1.6 mm from case.
e. Uses IRF840LC, SiHF840LC data and test conditions.
* Pb containing terminations are not RoHS compliant, exemptions may apply
Document Number: 91068
S11-1050-Rev. C, 30-May-11
www.vishay.com
1
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
IRF840LCS, IRF840LCL, SiHF840LCS, SiHF840LCL
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
Maximum Junction-to-Ambient
(PCB Mounted, Steady-State)
a
Maximum Junction-to-Case (Drain)
SYMBOL
R
thJA
R
thJC
TYP.
-
-
MAX.
40
1.0
UNIT
°C/W
Note
a. When mounted on 1" square PCB (FR-4 or G-10 material).
SPECIFICATIONS
(T
J
= 25 °C, unless otherwise noted)
PARAMETER
Static
Drain-Source Breakdown Voltage
V
DS
Temperature Coefficient
Gate-Source Threshold Voltage
Gate-Source Leakage
Zero Gate Voltage Drain Current
Drain-Source On-State Resistance
Forward Transconductance
Dynamic
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
Pulsed Diode Forward
Body Diode Voltage
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
Forward Turn-On Time
Current
a
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
V
DS
V
DS
/T
J
V
GS(th)
I
GSS
I
DSS
R
DS(on)
g
fs
C
iss
C
oss
C
rss
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
V
GS
= 0, I
D
= 250 μA
Reference to 25 °C, I
D
= 1 mA
c
V
DS
= V
GS
, I
D
= 250 μA
V
GS
= ± 20 V
V
DS
= 500 V, V
GS
= 0 V
V
DS
= 400 V, V
GS
= 0 V, T
J
= 125 °C
V
GS
= 10 V
I
D
= 4.8 A
b
V
DS
= 50 V, I
D
= 4.8 A
b
500
-
2.0
-
-
-
-
4.0
-
0.63
-
-
-
-
-
-
-
-
4.0
± 100
25
250
0.85
-
V
V/°C
V
nA
μA
S
V
GS
= 0 V,
V
DS
= 25 V,
f = 1.0 MHz, see fig. 5
c
-
-
-
-
1100
170
18
-
-
-
12
25
27
19
-
-
-
39
10
19
-
-
-
-
ns
nC
pF
V
GS
= 10 V
I
D
= 8.0 A, V
DS
= 400 V,
see fig. 6 and 13
b, c
-
-
-
V
DD
= 250 V, I
D
= 8.0 A,
R
g
= 9.1
,
R
D
= 30
,
see fig. 10
b, c
-
-
-
-
-
-
-
-
490
3.0
8.0
A
28
2.0
740
4.5
V
ns
μC
G
S
T
J
= 25 °C, I
S
= 8.0 A, V
GS
= 0 V
b
T
J
= 25 °C, I
F
= 8.0 A, dI/dt = 100 A/μs
b, c
-
-
-
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
and L
D
)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width
300 μs; duty cycle
2 %.
c. Uses SiHF840LC data and test conditions.
www.vishay.com
2
Document Number: 91068
S11-1050-Rev. C, 30-May-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
IRF840LCS, IRF840LCL, SiHF840LCS, SiHF840LCL
Vishay Siliconix
TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)
10
1
I
D
, Drain Current (A)
I
D
, Drain Current (A)
10
0
V
GS
15 V
10 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
Bottom 4.5 V
Top
10
1
150
°
C
25
°
C
4.5 V
10
-1
10
-1
10
0
20 µs Pulse Width
T
C
=
25 °C
10
1
10
0
20 µs Pulse Width
V
DS
=
50 V
4
5
6
7
8
9
10
91068_01
V
DS
, Drain-to-Source Voltage (V)
91068_03
V
GS,
Gate-to-Source Voltage (V)
Fig. 1 - Typical Output Characteristics
Fig. 3 - Typical Transfer Characteristics
R
DS(on)
, Drain-to-Source On Resistance
(Normalized)
10
1
I
D
, Drain Current (A)
10
0
V
GS
Top
15 V
10 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
Bottom 4.5 V
3.0
2.5
2.0
1.5
1.0
0.5
I
D
= 8.0 A
V
GS
= 10 V
4.5 V
10
-1
10
-1
91068_02
20 µs Pulse Width
T
C
=
150 °C
10
0
10
1
0.0
- 60 - 40 - 20 0
20 40 60 80 100 120 140 160
V
DS,
Drain-to-Source Voltage (V)
Fig. 2 - Typical Output Characteristics
91068_04
T
J,
Junction Temperature (°C)
Fig. 4 - Normalized On-Resistance vs. Temperature
Document Number: 91068
S11-1050-Rev. C, 30-May-11
www.vishay.com
3
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
IRF840LCS, IRF840LCL, SiHF840LCS, SiHF840LCL
Vishay Siliconix
2400
2000
I
SD
, Reverse Drain Current (A)
Capacitance (pF)
V
GS
= 0 V, f = 1 MHz
C
iss
= C
gs
+ C
gd
, C
ds
Shorted
C
rss
= C
gd
C
oss
= C
ds
+ C
gd
C
iss
1600
1200
800
400
0
10
0
10
1
C
oss
10
1
150
°
C
25
°
C
C
rss
10
0
0.6
91068_07
V
GS
= 0 V
0.8
1.0
1.2
1.4
1.6
91068_05
V
DS,
Drain-to-Source Voltage (V)
V
SD
, Source-to-Drain Voltage (V)
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
Fig. 7 - Typical Source-Drain Diode Forward Voltage
20
V
GS
, Gate-to-Source Voltage (V)
I
D
= 8.0 A
V
DS
= 400 V
10
3
5
2
Operation in this area limited
by R
DS(on)
16
I
D
, Drain Current (A)
V
DS
= 250 V
12
V
DS
= 100 V
10
2
5
2
10
µs
100
µs
1
ms
T
C
= 25
°C
T
J
= 150
°C
Single Pulse
1
2
5
10
5
2
8
4
For test circuit
see figure 13
1
5
2
10
ms
0
0
91068_06
0.1
8
16
24
32
40
48
91068_08
10
2
5
10
2
2
5
10
3
Q
G
, Total Gate Charge (nC)
V
DS
, Drain-to-Source Voltage (V)
Fig. 8 - Maximum Safe Operating Area
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
www.vishay.com
4
Document Number: 91068
S11-1050-Rev. C, 30-May-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
IRF840LCS, IRF840LCL, SiHF840LCS, SiHF840LCL
Vishay Siliconix
V
DS
8.0
R
g
V
GS
R
D
D.U.T.
+
- V
DD
I
D
, Drain Current (A)
6.0
10 V
Pulse width
≤
1 µs
Duty factor
≤
0.1 %
4.0
Fig. 10a - Switching Time Test Circuit
2.0
V
DS
90 %
0.0
25
50
75
100
125
150
10 %
V
GS
t
d(on)
t
r
t
d(off)
t
f
91068_09
T
C
, Case Temperature (°C)
Fig. 9 - Maximum Drain Current vs. Case Temperature
Fig. 10b - Switching Time Waveforms
10
Thermal Response (Z
thJC
)
1
D = 0.5
0.2
0.1
0.1
0.05
0.02
0.01
10
-2
10
-5
10
-4
10
-3
10
-2
0.1
Single Pulse
(Thermal Response)
P
DM
t
1
t
2
Notes:
1. Duty Factor, D = t
1
/t
2
2. Peak T
j
= P
DM
x Z
thJC
+ T
C
1
10
91068_11
t
1
, Rectangular Pulse Duration (s)
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
Document Number: 91068
S11-1050-Rev. C, 30-May-11
www.vishay.com
5
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
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