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SIHLL110T

Description
POWER, FET
CategoryDiscrete semiconductor    The transistor   
File Size360KB,9 Pages
ManufacturerVishay
Websitehttp://www.vishay.com
Download Datasheet Parametric Compare View All

SIHLL110T Overview

POWER, FET

SIHLL110T Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerVishay
package instruction,
Reach Compliance Codeunknow
ConfigurationSingle
Maximum drain current (Abs) (ID)1.5 A
FET technologyMETAL-OXIDE SEMICONDUCTOR
JESD-609 codee0
Operating modeENHANCEMENT MODE
Maximum operating temperature150 °C
Polarity/channel typeN-CHANNEL
Maximum power dissipation(Abs)3.1 W
surface mountYES
Terminal surfaceTin/Lead (Sn/Pb)
IRLL110, SiHLL110
www.vishay.com
Vishay Siliconix
Power MOSFET
PRODUCT SUMMARY
V
DS
(V)
R
DS(on)
()
Q
g
(Max.) (nC)
Q
gs
(nC)
Q
gd
(nC)
Configuration
V
GS
= 5.0 V
6.1
2.6
3.3
Single
D
FEATURES
100
0.54
Surface mount
Available in tape and reel
Dynamic dV/dt rating
Repetitive avalanche rated
Logic-level gate drive
Available
R
DS(on)
specified at V
GS
= 4 V and 5 V
Fast switching
Material categorization: for definitions of compliance
please see
www.vishay.com/doc?99912
DESCRIPTION
SOT-223
D
S
S
G
G
D
Marking code: LB
N-Channel MOSFET
Third generation power MOSFETs from Vishay provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and
cost-effectiveness.
The SOT-223 package is designed for surface-mounting
using vapor phase, infrared, or wave soldering techniques.
Its unique package design allows for easy automatic
pick-and-place as with other SOT or SOIC packages but
has the added advantage of improved thermal performance
due to an enlarged tab for heatsinking. Power dissipation of
greater than 1.25 W is possible in a typical surface mount
application.
ORDERING INFORMATION
Package
Lead (Pb)-free and Halogen-free
Lead (Pb)-free
Note
a. See device orientation.
SOT-223
Tube
-
IRLL110PbF
SOT-223
Tape and Reel
SiHLL110TR-GE3
IRLL110TRPbF
a
ABSOLUTE MAXIMUM RATINGS
(T
C
= 25 °C, unless otherwise noted)
PARAMETER
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
Pulsed Drain Current
a
Linear Derating Factor
Linear Derating Factor (PCB Mount)
e
Single Pulse Avalanche Energy
b
Repetitive Avalanche
Current
a
T
C
= 25 °C
Mount)
e
T
A
= 25 °C
Repetitive Avalanche Energy
a
Maximum Power Dissipation
Maximum Power Dissipation (PCB
Peak Diode Recovery dV/dt
c
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak
Temperature)
d
for 10 s
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. V
DD
= 25 V, starting T
J
= 25 °C, L = 25 mH, R
g
= 25
,
I
AS
= 1.5 A (see fig. 12).
c. I
SD
5.6 A, dI/dt
75 A/μs, V
DD
V
DS
, T
J
150 °C.
d. 1.6 mm from case.
e. When mounted on 1" square PCB (FR-4 or G-10 material).
S15-1195-Rev. F, 25-May-15
Document Number: 91320
1
For technical questions, contact:
hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
E
AS
I
AR
E
AR
P
D
dV/dt
T
J
, T
stg
V
GS
at 5.0 V
T
C
= 25 °C
T
C
= 100 °C
SYMBOL
V
DS
V
GS
I
D
I
DM
LIMIT
100
± 10
1.5
0.93
12
0.025
0.017
50
1.5
0.31
3.1
2.0
5.5
-55 to +150
300
W/°C
mJ
A
mJ
W
V/ns
°C
A
UNIT
V

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Description POWER, FET POWER, FET POWER, FET POWER, FET
Is it Rohs certified? incompatible incompatible conform to conform to
Maker Vishay Vishay Vishay Vishay
Reach Compliance Code unknow unknow compli compli
Configuration Single Single SINGLE WITH BUILT-IN DIODE SINGLE WITH BUILT-IN DIODE
Maximum drain current (Abs) (ID) 1.5 A 1.5 A 1.5 A 1.5 A
FET technology METAL-OXIDE SEMICONDUCTOR METAL-OXIDE SEMICONDUCTOR METAL-OXIDE SEMICONDUCTOR METAL-OXIDE SEMICONDUCTOR
JESD-609 code e0 e0 e3 e3
Operating mode ENHANCEMENT MODE ENHANCEMENT MODE ENHANCEMENT MODE ENHANCEMENT MODE
Maximum operating temperature 150 °C 150 °C 150 °C 150 °C
Polarity/channel type N-CHANNEL N-CHANNEL N-CHANNEL N-CHANNEL
Maximum power dissipation(Abs) 3.1 W 3.1 W 3.1 W 3.1 W
surface mount YES YES YES YES
Terminal surface Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Matte Tin (Sn) Matte Tin (Sn)
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