Freescale Semiconductor
Data Sheet: Technical Data
Document Number: MPC5668X
Rev. 6, 03/2011
MPC5668x
MPC5668x Microcontroller
Data Sheet
MPC5668x features:
• 32-bit CPU core complex (e200z650)
– Compliant with Power Architecture embedded category
– 32 KB unified cache with line locking and eight-entry
store buffer16
– Execution speed static to 116 MHz
• 32-bit I/O processor (e200z0)
– Execution speed static to 1/2 CPU core speed (58 MHz)
• 2 MB on-chip flash
– Supports read during program and erase operations, and
multiple blocks allowing EEPROM emulation
• 512 KB + 80 KB (592 KB) on-chip ECC SRAM
(MPC5668G)
• 128 KB on-chip ECC SRAM (MPC5668E)
• 16-entry Memory Protection Unit (MPC5668E only)
• Direct memory access controller
– 16-channel on MPC5668G
– 32-channel on MPC5668E
• Fast ethernet controller
– Supports 10-Mbps and 100-Mbps IEEE 802.3 MII,
10-Mbps 7-wire interface
– IEEE 802.3 MAC (compliant with IEEE 802.3 1998
edition)
• Media Local Bus (MLB) interface (MPC5668G only)
– Supports 16 logical channels, max speed 1024 Fs
• Interrupt controller (INTC) supports 316 external interrupt
vectors (22 are reserved)
• System clocks
– Frequency-modulated phase-locked loop (FMPLL)
– 4 – 40 MHz crystal oscillator (XTAL)
– 32 kHz crystal oscillator (XTAL)
– Dedicated 16 MHz and 128 kHz internal RC oscillators
• Analog to Digital Converter (ADC) module
– 10-bit A/D resolution
– 32 external channels
– 36 internal channels (MPC5668G)
– 64 internal channels (MPC5668E)
MAPBGA–208
17 mm x 17 mm
MAPBGA–256
17 mm x 17 mm
• Cross-Triggering Unit (MPC5668E only)
– Internal conversion triggering for ADC
– Triggerable by internal timers or eMIOS200
• Deserial Serial Peripheral Interface (DSPI)
– Four individual DSPI modules
– Full duplex, synchronous transfers
– Master or slave operation
• Inter-IC communication (I
2
C) interface
– Four individual I
2
C modules
– Multi-master operation
• Serial Communication Interface (eSCI) module
– Two-channel DMA interface
– Configurable as LIN bus master
• eMIOS200 timed input/output
– 24 channels, 16-bit timers (MPC5668G)
– 32 channels, 16-bit timers (MPC5668E)
• Controller Area Network (FlexCAN) module
– Compliant with CAN protocol specification, Version
2.0B active
– 64 mailboxes, each configurable as transmit or receive
• Dual-channel FlexRay controller
– Full implementation of FlexRay Protocol Specification
2.1, RevA
– 128 message buffers
• JTAG controller (MPC5668G only)
– Compliant with the IEEE 1149.1-2001
• Nexus Development Interface (NDI)
– Available in 256 MAPBGA package only
– Compliant with IEEE-ISTO 5001-2003
– Nexus class 3 development support on e200z650
– Nexus class 2+ development support on e200z0
• Internal voltage regulator allows operation from single
3.3 V or 5 V supply
This document contains information on a product under development. Freescale reserves the
right to change or discontinue this product without notice.
© Freescale Semiconductor, Inc., 2010, 2011. All rights reserved.
Table of Contents
1
2
3
Ordering Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
1.1 Orderable Parts. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
MPC5668x Block Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . .4
Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
3.1 208-ball MAPBGA Pin Assignments . . . . . . . . . . . . . . . .6
3.2 256-ball MAPBGA Pin Assignments . . . . . . . . . . . . . . . .7
3.3 Pin Muxing and Reset States . . . . . . . . . . . . . . . . . . . . .8
3.3.1 Power and Ground Supply Summary . . . . . . . .25
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . .26
4.1 Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26
4.2 Thermal Characteristics . . . . . . . . . . . . . . . . . . . . . . . .27
4.2.1 General Notes for Specifications at Maximum
Junction Temperature . . . . . . . . . . . . . . . . . . . .27
4.3 ESD Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .30
4.4 VRC Electrical Specifications . . . . . . . . . . . . . . . . . . . .30
4.5 DC Electrical Specifications . . . . . . . . . . . . . . . . . . . . .30
4.6 Operating Current Specifications
. . . . . . . . . . . . . .32
4.7 I/O Pad Current Specifications . . . . . . . . . . . . . . . . . . .34
4.7.1 I/O Pad V
DD33
Current Specifications . . . . . . . .35
Low Voltage Characteristics . . . . . . . . . . . . . . . . . . . .
Oscillators Electrical Characteristics . . . . . . . . . . . . . .
FMPLL Electrical Characteristics. . . . . . . . . . . . . . . . .
ADC Electrical Characteristics. . . . . . . . . . . . . . . . . . .
Flash Memory Electrical Characteristics . . . . . . . . . . .
Pad AC Specifications . . . . . . . . . . . . . . . . . . . . . . . . .
AC Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.14.1 Reset and Boot Configuration Pins . . . . . . . . .
4.14.2 External Interrupt (IRQ) and Non-Maskable
Interrupt (NMI) Pins . . . . . . . . . . . . . . . . . . . . .
4.14.3 JTAG (IEEE 1149.1) Interface . . . . . . . . . . . . .
4.14.4 Nexus Debug Interface. . . . . . . . . . . . . . . . . . .
4.14.5 Enhanced Modular I/O Subsystem (eMIOS) . .
4.14.6 Deserial Serial Peripheral Interface (DSPI) . . .
4.14.7 MLB Interface . . . . . . . . . . . . . . . . . . . . . . . . . .
4.14.8 Fast Ethernet Interface . . . . . . . . . . . . . . . . . .
Package Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.1 Package Mechanical Data . . . . . . . . . . . . . . . . . . . . . .
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.8
4.9
4.10
4.11
4.12
4.13
4.14
36
36
38
39
39
40
43
43
43
44
47
49
50
55
57
61
61
65
4
5
6
Table 1. MPC5668G/MPC5668E Comparison
Feature
Package
RAM with ECC
MPU
DMA
Ethernet (FEC)
MediaLB (MLB-DIM)
FlexRay
ADC (10-bit)
Total Timer I/O (eMIOS200)
Cross Trigger Unit (CTU)
SCI (eSCI)
SPI (DSPI)
CAN (FlexCAN)
I
2
C
Nexus3 Debug (e200Z6)
Nexus2+ Debug (e200Z0)
MPC5668G
208 MAPBGA
256 MAPBGA
MPC5668E
208 MAPBGA
256 MAPBGA
592 KB
No
16-channel
Yes
Yes
Yes (128 Message Buffers)
36 internal channels
Supports 32 external channels
24 channels, 16-bit
No
6
4
6
4
Supported on 256BGA
—
emulation package
128 KB
16 entry
32-channel
No
No
No
64 internal channels
Supports 32 external channels
32 channels, 16-bit
Yes
12
4
5
4
Supported on 256BGA
—
emulation package
MPC5668x Microcontroller Data Sheet, Rev. 6
2
Freescale Semiconductor
Ordering Information
1
1.1
Ordering Information
Orderable Parts
S PC 5668G F 0A V MG R
Qualification status
Core code
Device number
Fabrication Site
Revision
Temperature range
Package identifier
Tape and reel status
Qualification Status
P = Prototype
M = Fully spec. qualified, general market flow
S = Fully spec. qualified, automotive flow
Core Code
PC = Power Architecture
Fabrication Site
F = Freescale
Temperature Range
V = –40 °C to 105 °C
M = –40 °C to 125 °C
Package Identifier
MG = 208 MAPBGA Pb-free
MJ = 256 MAPBGA Pb-free
Tape and Reel Status
R = Tape and reel
(blank) = Trays
Note:
Not all options are available on all devices. Refer to
Table 1.
Table 1
shows the orderable part numbers for the MPC5668x.
Table 1. Orderable Part Numbers
Freescale Part Number
1
PPC5668GF1AVMJ
4
SPC5668GF1AMMG
SPC5668EF1AVMG
SPC5668EF1AVMGR
SPC5668GF1AMMGR
SPC5668GF1AVMG
SPC5668GF1AVMGR
1
Speed (MHz)
Package Description
MPC5668G 256 MAPBGA package
Lead-free (PbFree)
MPC5668G 208 MAPBGA package
Lead-free (PbFree)
MPC5668G 208 MAPBGA package
Lead-free (PbFree)
MPC5668G 208 MAPBGA package
Lead-free (PbFree)
MPC5668G 208 MAPBGA package
Lead-free (PbFree)
MPC5668G 208 MAPBGA package
Lead-free (PbFree)
MPC5668G 208 MAPBGA package
Lead-free (PbFree)
Max
3
(f
MAX
)
116
116
116
116
116
116
116
Operating Temperature
2
Min (T
L
)
–40 °C
–40 °C
–40 °C
–40 °C
–40 °C
–40 °C
–40 °C
Max (T
H
)
105 °C
125 °C
105 °C
105 °C
125 °C
105 °C
105 °C
2
3
4
All packaged devices are PPC5668x, rather than MPC5668x or SPC5668x, until product qualifications are complete. The
unpackaged device prefix is PCC, rather than SCC, until product qualification is complete.
Not all configurations are available in the PPC parts.
The lowest ambient operating temperature (T
A
) is referenced by T
L
; the highest ambient operating temperature is referenced
by T
H
.
Maximum speed is the maximum frequency allowed including frequency modulation (FM).
The 256 MAPBGA package for the MPC5668x is not intended for full production qualification, and is supplied for
development use only.
MPC5668x Microcontroller Data Sheet, Rev. 6
Freescale Semiconductor
3
MPC5668x Block Diagrams
2
MPC5668x Block Diagrams
DEBUG
JTAG
NDI
Nexus3(Z6)
NDI
Nexus2+(Z0)
Figure 1
shows a top-level block diagram of the MPC5668G device.
MPC5668G
MASTERS
e200z650 Core
VLE
MMU(32TLB)
32 kHz
XTAL
4–40 MHz
XTAL
16 MHz
IRC
VREG
Controller
128 kHz
IRC
FMPLL
RTC/API
SWT
STM
Semaphores
e200z0 Core
VLE
FPU/SPE
32K Cache
4/8 Way
16ChDMA
Mux
FEC
MLB-DIM
FlexRay
INTC
PIT
BAM
SIU
SPP Crossbar Switch (XBAR)
AIPS(0) Bridge B
6 x eSCI
36 x ADC
24 x eMIOS
2 x I
2
C
2 x DSPI
6 x FlexCAN
AIPS(1) Bridge A
2 x DSPI
2xI
2
C
512 KB
80 KB
SRAM
(ECC)
ECSM
SRAM
(ECC)
Standby RAM
2 MB
Flash
(ECC)
ECSM
ECSM
LEGEND
ADC
– Analog to Digital Converter
BAM
– Boot Assist Module
DSPI
– Serial Peripherals Interface
ECC
– Error Correction Code
ECSM
– Error Correction Status Module
eMIOS
– Timed Input Output
eDMA
– Enhanced Direct Memory Access controller
eSCI
– Serial Communications Interface
FEC
– Fast Ethernet Controller
FlexCAN
– Controller Area Network controller
FlexRay™
– FlexRay Bus Controller
FMPLL
– Frequency Modulated Phase Locked Loop
I
2
C
INTC
JTAG
MLB-DIM
NDI
PIT
RTC
SIU
STM
SWT
VREG
– Inter IC Controller
– Interrupt Controller
– Joint Test Action Group interface
– Media Local Bus Device Interface Module
– Nexus Debug Interface
– Periodic Interrupt Timer
– Real Time Clock
– System Integration
– System Timer Module
– Software Watchdog Timer
– Voltage Regulator
Figure 1. MPC5668G Block Diagram
MPC5668x Microcontroller Data Sheet, Rev. 6
4
Freescale Semiconductor
MPC5668x Block Diagrams
Figure 2
shows a top level block diagram for the MPC5668E device.
DEBUG
JTAG
NDI
Nexus3(Z6)
NDI
Nexus2+(Z0)
MPC5668E
MASTERS
e200z650 Core
VLE
MMU(32TLB)
32 kHz
XTAL
4–40 MHz
XTAL
16 MHz
IRC
VREG
Controller
128 kHz
IRC
FMPLL
RTC/API
SWT
STM
e200z0 Core
VLE
FPU/SPE
32K Cache
4/8 Way
Semaphores
32ChDMA
Mux
INTC
PIT
BAM
SIU
SPP Crossbar Switch (XBAR)
Memory Protection Unit (MPU)
AIPS(0) Bridge B
64 x ADC
2 MB
Flash
(ECC)
ECSM
CTU
LEGEND
ADC
BAM
CTU
DSPI
ECC
ECSM
eDMA
eMIOS200
eSCI
FlexCAN
FMPLL
– Analog to Digital Converter
– Boot Assist Module
– Cross Triggering Unit
– Serial Peripherals Interface controller
– Error Correction Code
– Error Correction Status Module
– Enhanced Direct Memory Access controller
– Timed Input Output
– Serial Communications Interface
– Controller Area Network controller
– Frequency Modulated Phase Locked Loop
AIPS(1) Bridge A
4 x eSCI
2 x DSPI
2 x I
2
C
128 KB
SRAM
(ECC)
Standby RAM
ECSM
5 x FlexCAN
2 x DSPI
2 x I
2
C
32 x eMIOS
8 x eSCI
I
2
C
INTC
JTAG
MPU
NDI
PIT
RTC
SIU
STM
SWT
VREG
– Inter IC Controller
– Interrupt Controller
– Joint Test Action Group interface
– Memory Protection Unit
– Nexus Debug Interface
– Periodic Interrupt Timer
– Real Time Clock
– System Integration
– System Timer Module
– Software Watchdog Timer
– Voltage Regulator
Figure 2. MPC5668E Block Diagram
MPC5668x Microcontroller Data Sheet, Rev. 6
Freescale Semiconductor
5
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