74LVX132 — Low Voltage Quad 2-Input NAND Schmitt Trigger
February 2008
74LVX132
Low Voltage Quad 2-Input NAND Schmitt Trigger
Features
■
Input voltage level translation from 5V to 3V
■
Ideal for low power/low noise 3.3V applications
■
Guaranteed simultaneous switching noise level and
General Description
The LVX132 contains four 2-input NAND Schmitt Trigger
Gates. The pin configuration and function are the same
as the LVX00 but the inputs have hysteresis between the
positive-going and negative-going input thresholds,
which are capable of transforming slowly changing input
signals into sharply defined, jitter-free output signals,
thus providing greater noise margins than conventional
gates.
The inputs tolerate voltages up to 7V allowing the inter-
face of 5V systems to 3V systems.
dynamic threshold performance
Ordering Information
Order
Number
74LVX132M
74LVX132SJ
74LVX132MTC
Package
Number
M14A
M14D
MTC14
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
©1996 Fairchild Semiconductor Corporation
74LVX132 Rev. 1.4.0
www.fairchildsemi.com
74LVX132 — Low Voltage Quad 2-Input NAND Schmitt Trigger
Connection Diagram
Logic Diagram
Pin Description
Pin Names
A
n
, B
n
Y
n
Descriptions
Inputs
Outputs
©1996 Fairchild Semiconductor Corporation
74LVX132 Rev. 1.4.0
www.fairchildsemi.com
2
74LVX132 — Low Voltage Quad 2-Input NAND Schmitt Trigger
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
V
CC
I
IK
V
I
I
OK
Supply Voltage
Parameter
DC Input Diode Current, V
I
=
–0.5V
DC Input Voltage
DC Output Diode Current
V
O
=
–0.5V
V
O
=
V
CC
+ 0.5V
Rating
–0.5V to +7.0V
–20mA
–0.5V to 7V
–20mA
+20mA
–0.5V to V
CC
+ 0.5V
±25mA
±50mA
–65°C to +150°C
180mW
V
O
I
O
DC Output Voltage
DC Output Source or Sink Current
I
CC
or I
GND
DC V
CC
or Ground Current
T
STG
Storage Temperature
P
Power Dissipation
Recommended Operating Conditions
(1)
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
V
CC
V
I
V
O
T
A
∆
t /
∆
V
Supply Voltage
Input Voltage
Output Voltage
Operating Temperature
Input Rise and Fall Time
Parameter
Rating
2.0V to 3.6V
0V to 5.5V
0V to V
CC
–40°C to +85°C
0ns/V to 100ns/V
Note:
1. Unused inputs must be held HIGH or LOW. They may not float.
©1996 Fairchild Semiconductor Corporation
74LVX132 Rev. 1.4.0
www.fairchildsemi.com
3
74LVX132 — Low Voltage Quad 2-Input NAND Schmitt Trigger
DC Electrical Characteristics
T
A
=
+25°C
Symbol
V
t
+
V
t
–
V
H
V
OH
T
A
=
–40°C to
+85°C
Min.
0.9
1.2
0.3
1.9
2.9
2.48
1.2
Parameter
Positive Threshold
Negative Threshold
Hysteresis
HIGH Level Output
Voltage
V
CC
(V)
3.0
3.0
3.0
2.0
3.0
3.0
Conditions
Min.
0.9
0.3
Typ.
Max.
2.2
Max.
2.2
Units
V
V
V
V
V
IN
=
V
IL
or V
IH
,
I
OH
=
–50µA
V
IN
=
V
IL
or V
IH
,
I
OH
=
–50µA
V
IN
=
V
IL
or V
IH
,
I
OH
=
–4mA
V
IN
=
V
IL
or V
IH
,
I
OL
=
50 µA
V
IN
=
V
IL
or V
IH
,
I
OL
=
50 µA
V
IN
=
V
IL
or V
IH
,
I
OL
=
4 mA
V
IN
=
5.5V or GND
V
IN
=
V
CC
or GND
1.9
2.9
2.58
2.0
3.0
V
OL
LOW Level Output
Voltage
2.0
3.0
3.0
0.0
0.0
0.1
0.1
0.36
±0.1
2.0
0.1
0.1
0.44
±1.0
20
V
I
IN
I
CC
Input Leakage
Current
Quiescent Supply
Current
3.6
3.6
µA
µA
Noise Characteristics
(2)
T
A
=
25°C
Symbol
V
OLP
V
OLV
V
IHD
V
ILD
Parameter
Quiet Output Maximum Dynamic V
OL
Quiet Output Minimum Dynamic V
OL
Minimum HIGH Level Dynamic Input Voltage
Maximum LOW Level Dynamic Input Voltage
V
CC
(V)
3.3
3.3
3.3
3.3
C
L
(pF)
50
50
50
50
Typ.
0.3
–0.3
Limit
0.5
–0.5
2.0
0.8
Units
V
V
V
V
Note:
2. Input t
r
=
t
f
=
3ns
©1996 Fairchild Semiconductor Corporation
74LVX132 Rev. 1.4.0
www.fairchildsemi.com
4
74LVX132 — Low Voltage Quad 2-Input NAND Schmitt Trigger
AC Electrical Characteristics
T
A
=
+25°C
Symbol
t
PLH
, t
PHL
T
A
=
–40°C to
+85°C
Min.
1.0
1.0
1.0
1.0
Parameter
Propagation Delay Time
V
CC
(V)
2.7
3.3 ± 0.3
C
L
(pF)
15
50
15
50
50
Min.
Typ.
7.0
10.5
6.1
9.0
Max.
11.5
16.0
10.6
15.4
1.5
1.5
Max.
13.0
18.7
12.5
17.5
1.5
1.5
Units
ns
t
OSLH
, t
OSHL
Output to Output Skew
(3)
2.7
3.3
ns
Note:
3. Parameter guaranteed by design t
OSLH
=
|t
PLHm
–t
PLHn
|, t
OSHL
=
|t
PHLm
–t
PHLn
|
Capacitance
T
A
=
+25°C
Symbol
C
IN
C
PD
T
A
=
–40°C to
+85°C
Max.
10
Parameter
Input Capacitance
Power Dissipation Capacitance
(4)
Min.
Typ.
4
18
Min.
Max.
10
Units
pF
pF
Note:
4. C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating current
consumption without load.
C
PD
×
V
CC
×
f
IN
×
I
CC
Average operating current can be obtained by the eqation: I
CC(opr.)
=
--------------------------------------------------------
-
6
(
per
,
Gate
)
©1996 Fairchild Semiconductor Corporation
74LVX132 Rev. 1.4.0
www.fairchildsemi.com
5
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