ACE24C02A
Two-wire Serial EEPROM
Description
The ACE24C02A provides low operation voltage of 2048 bits of serial electrically erasable and programmable
read-only memory (EEPROM) organized as 256 words of 8 bits each. The device is optimized for use in many
industrial and commercial applications where low-power and low-voltage operations are essential.
Features
Low Operation Voltage: Vcc=1.7V to 5.5V
5V tolerant I/O
Internally Organized: 256x8
Two-wire Serial Interface
Schmitt Trigger, Filtered Inputs for Noise Suppression
Bi-directional Data Transfer Protocol
1MHz(2.5V~5.5V) and 400kHz(1.7V) Compatibility
Write Protect Pin for Hardware Data Protection
8-byte Page Write Modes
Partial Page Writes are Allowed
Self-timed Write Cycle (5 ms max)
High-reliability - Endurance: 1,000,000 Write Cycles
- Data Retention: 100 Years
Absolute Maximum Ratings
Operating Temperature
Storage Temperature
Voltage on Any Pin with Respect to Ground
Maximum Operating Voltage
DC Output Current
-55℃ to +125℃
-65℃ to +150℃
-1.0V to +7.0V
6.25V
5.0 mA
*Notice: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational
sections of this specification are not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
VER 1.4
1
ACE24C02A
Two-wire Serial EEPROM
Packaging Type
Pin Configurations
Pin Name
A0~A2
SDA
SCL
WP
VCC
GND
Function
Device Address Inputs
Serial Data Input / Output
Serial Clock Input
Write Protect
Power Supply
Ground
Block Diagram
Figure 1
VER 1.4
2
ACE24C02A
Two-wire Serial EEPROM
Ordering Information
ACE24C02A XX + X H
Halogen - free
U : Tube
T : Tape and Reel
Pb - free
DP : PDIP-8
FM : SOP-8
TM : TSSOP-8
Pin Description
Serial Clock (SCL):
The SCL input is used to positive edge clock data into each EEPROM device and negative edge clock
data out of each device.
Serial Data (SDA):
The SDA pin is bi-directional for serial data transfer. This pin is open-drain driven and may be
wire-ORed with any number of other open-drain or open-collector devices.
Write Protect (WP):
The ACE24C02A has a Write Protect pin that provides hardware data protection. The Write Protect pin allows
normal read/write operations when connected to ground (GND). When the Write Protect pin is conceded to Vcc
the write protection feature is enabled.
Write Protect Description
WP Pin Status
WP=V
CC
WP=GND
Part of the Array Protected
Full (2K) Array
Normal Read / Write Operations
Memory Organization
ACE24C02A, 2K SERIAL EEPROM:
Internally organized with 32 pages of 8 bytes each, the 2K requires an 8-bit data word address
for random word addressing.
VER 1.4
3
ACE24C02A
Two-wire Serial EEPROM
Pin Capacitance
Applicable over recommended operating range from: T
A
= 25℃, f = 1.0 MHz, V
CC
= +1.7V.
Symbol
C
I/O 1
C
IN 1
Test Condition
Input / Output Capacitance (SDA)
Input Capacitance (A
0
, A
1
, A
2
, SCL)
Max
8
6
Units
pF
pF
Conditions
V
I/O
= 0V
V
IN
= 0V
Note: This parameter is characterized and is not 100% tested.
DC Characteristics
Applicable over recommended operating range from: T
A
= -40℃ to +85℃, (unless otherwise noted).
Symbol
V
CC
I
CC1
I
CC2
I
SB1
I
SB2
I
LI
I
LO
V
IL1
V
IH1
V
OL2
V
OL1
Parameter
Supply Voltage
Supply Current
Supply Current
Standby Current
Standby Current
Input Leakage Current
Output Leakage Current
Input Low Level
Input High Level
Output Low Level
Output Low Level
Test Condition
Min
1.7
Typ
Max
5.5
Units
V
mA
mA
µA
µA
µA
µA
V
V
V
V
V
CC
= 5.5V, Read at 400K
V
CC
= 5.5V, Write at 400K
V
CC
= 1.7V, V
IN
= V
CC
/ V
SS
V
CC
= 5.5V, V
IN
= V
CC
/ V
SS
V
IN
= V
CC
/V
SS
V
OUT
= V
CC
/ V
SS
-0.6
V
CC
x0.7
V
CC
= 3.0V, I
OL
= 2.1 mA
V
CC
= 1.7V, I
OL
= 0.15 mA
0.4
2.0
3
8
0.10
0.05
1.0
3.0
6.0
18.0
3.0
3.0
V
CC
x0.3
5.5
0.4
0.2
Note: 1.
V
IL
min and
V
IH
max are reference only and are not tested.
VER 1.4
4
ACE24C02A
Two-wire Serial EEPROM
AC Characteristics
Applicable over recommended operating range from: T
A
= -40℃ to +85℃, V
CC
= +1.7V to +5.5V, CL = 100pF (unless
otherwise noted). Test conditions are listed in Note 2.
Symbol
f
SCL
T
LOW
T
HIGH
T
AA
T
BUF1
T
HD.STA
T
SU.STA
T
HD.DAT
T
SU.DAT
T
R
T
F
T
SU.STO
T
DH
T
WR
Endurance
(1)
Parameter
Clock Frequency, SCL
Clock Pulse Width Low
Clock Pulse Width High
Clock Low to Data Out Valid
Time the bus must be free before a new
transmission can Start
Start Hold Time
Start Setup Time
Data In Hold Time
Data In Setup Time
Inputs Rise Time
Inputs Fall Time
Stop Setup Time
Data Out Hold Time
Write Cycle Time
3.3V, 25℃, Page Mode
1.7-volt
2.5-volt
5.5-volt
Min Max Min Max Min Max
400
1.3
0.6
0.4
0.4
1000
0.4
0.4
1000
Units
kHz
µs
µs
µs
µs
µs
µs
µs
ns
0.05 0.9 0.05 0.55 0.05 0.55
1.2
0.6
0.6
0
100
0.3
300
0.6
50
5
0.25
50
5
1,000,000
0.5
0.25
0.25
0
100
0.3
100
0.25
50
5
0.5
0.25
0.25
0
100
0.3
100
µs
ns
µs
ns
ms
Write
Cycles
Notes:1. This parameter is characterized and not 100% tested.
2.AC measurement conditions:
RL (connects to Vcc): 1.3kΩ
Input pulse voltages: 0.3 Vcc to 0.7 Vcc
Input rise and fall times:
≦50
ns
Input and output timing reference voltages: 0.5Vcc
Device Operation
Clock and Data Transitions:
The SDA pin is normally pulled high with an external device. Data on the SDA pin may change only
during SCL low time periods (refer to Figure 4). Data changes during SCL high periods will indicate a
start or stop condition as defined below.
Start Condition:
A high-to-low transition of SDA with SCL high is a start condition which must precede any other
command (refer to Figure 5).
VER 1.4
5
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