High Speed Super Low Power SRAM
32K-Word By 8 Bit
CS18LV02565
Revision History
Rev. No.
2.0
History
Initial issue with new naming rule
Issue Date
Dec.29,2004
Remark
1
Rev. 2.0
Chiplus reserves the right to change product or specification without notice.
High Speed Super Low Power SRAM
32K-Word By 8 Bit
CS18LV02565
GENERAL DESCRIPTION
The CS18LV02565 is a high performance, high speed and super low power CMOS Static Random
Access Memory organized as 32,768 words by 8bits and operates for a single 4.5 to 5.5V supply voltage.
Advanced CMOS technology and circuit techniques provide both high speed, super low power features
and maximum access time of 55/70ns in 5.0V operation. Easy memory expansion is provided by an
active LOW chip enable (/CE) and active LOW output enable (/OE).
The CS18LV02565 has an automatic power down feature, reducing the power consumption
significantly when chip is deselected. The CS18LV02565 is available in JEDEC standard 28-pin TSOP I
(8x13.4 mm), SOP (330 mil) and PDIP (600 mil) packages.
FEATURES
Wide operation voltage : 4.5 ~ 5.5V
Ultra low power consumption : 2mA＠1MHz (Max.) , Vcc=5.0V.
1.0 uA (Typ.) CMOS standby current
High speed access time : 55/70ns.
Automatic power down when chip is deselected.
Three state outputs and TTL compatible.
Data retention supply voltage as low as 1.5V.
Easy expansion with /CE and /OE options.
PRODUCT FAMILY
Product Family
Operating Temp.
Vcc Range
Speed (ns)
Standby Current(Typ.)
I
CCSB1
1.0 uA
(Vcc = 5.0V)
Package Type
28 SOP
0~70
o
C
55/70
28 TSOP I
28 PDIP
Dice
28 SOP
CS18LV02565
4.5~5.5V
1.5 uA
(Vcc= 5.0V)
-40~85
o
C
55/70
28 TSOP I
28 PDIP
Dice
2
Rev. 2.0
Chiplus reserves the right to change product or specification without notice.
High Speed Super Low Power SRAM
32K-Word By 8 Bit
CS18LV02565
28
27
26
25
24
23
22
21
20
19
18
17
16
15
A10
CE
DQ7
DQ6
DQ5
DQ4
DQ3
GND
DQ2
DQ1
DQ0
A0
A1
A2
PIN CONFIGURATIONS
OE
A11
A9
A8
A13
WE
VCC
A14
A12
A7
A6
A5
A4
A3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28TSOP(I)-8x13.4mm
FUNCTIONAL BLOCK DIAGRAM
A5
A6
A7
A8
A9
A11
A12
A13
A14
DQ0
Address
Input
Buffer
18
Row
Decoder
512
Memory Array
512x512
512
8
Data Input
Buffer
Data Output
Buffer
8
Column I/O
DQ7
8
8
Write Driver
Sense Amp
64
Column Decoder
/CE
/WE
/OE
VCC
GND
Control
12
Address Input Buffer
A0 A1 A2 A3 A4 A10
3
Rev. 2.0
Chiplus reserves the right to change product or specification without notice.
High Speed Super Low Power SRAM
32K-Word By 8 Bit
CS18LV02565
Function
PIN DESCRIPTIONS
Name
A0 – A14
Type
Input
Address inputs for selecting one of the 32,768 x 8 bit words in the RAM
/CE is active LOW. Chip enable must be active when data read from or write
/CE
Input
to the device. If chip enable is not active, the device is deselected and in a
standby power mode. The DQ pins will be in high impedance state when the
device is deselected.
The Write enable input is active LOW. It controls read and write operations.
/WE
Input
With the chip selected, when /WE is HIGH and /OE is LOW, output data will
be present on the DQ pins, when /WE is LOW, the data present on the DQ
pins will be written into the selected memory location.
The output enable input is active LOW. If the output enable is active while the
/OE
Input
chip is selected and the write enable is inactive, data will be present on the
DQ pins and they will be enabled. The DQ pins will be in the high impedance
state when /OE is inactive.
DQ0~DQ7
Vcc
Gnd
I/O
Power
Power
These 8 bi-directional ports are used to read data from or write data into the
RAM.
Power Supply
Ground
TRUTH TABLE
Mode
Standby
Output Disabled
Read
Write
/CE
H
L
L
L
/WE
X
H
H
L
/OE
X
H
L
X
DQ0~7
High Z
High Z
D
OUT
D
IN
Vcc Current
I
CCSB
, I
CCSB1
I
CC
I
CC
I
CC
4
Rev. 2.0
Chiplus reserves the right to change product or specification without notice.
High Speed Super Low Power SRAM
32K-Word By 8 Bit
CS18LV02565
Rating
-0.5 to Vcc+0.5
-40 to +125
-60 to +150
1.0
20
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
TERM
T
BIAS
T
STG
P
T
I
OUT
Parameter
Terminal Voltage with Respect to GND
Temperature Under Bias
Storage Temperature
Power Dissipation
DC Output Current
Unit
V
O
O
C
C
W
mA
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to
the device. This is a stress rating only and functional operation of the device at these or any other conditions above
those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
OPERATING RANGE
Range
Commercial
Industrial
Ambient Temperature
0~70
o
C
-40~85
o
C
Vcc
4.5~5.5V
4.5~5.5V
CAPACITANCE
(1)
(TA=25℃,f=1.0MHz)
Symbol
C
IN
C
DQ
Parameter
Input Capacitance
Input/Output Capacitance
Conduction
VIN=0V
VI/O=0V
MAX.
6
8
Unit
pF
pF
1. This parameter is guaranteed, and not 100% tested.
5
Rev. 2.0
Chiplus reserves the right to change product or specification without notice.
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