DM74LS54N datasheet, PDF - EEWORLD Datasheet

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DM74LS54N: Description4-WIDE, 2-Input AND-OR-INVERT Gate; Categorylogic logic; File Size109KB，6 Pages; ManufacturerNational Semiconductor（TI ）; Websitehttp://www.ti.com

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DM74LS54N Overview

4-WIDE, 2-Input AND-OR-INVERT Gate

DM74LS54N Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	National Semiconductor（TI ）
package instruction	DIP, DIP14,.3
Reach Compliance Code	unknow
Other features	2-3-3-2 INPUTS
series	LS
JESD-30 code	R-PDIP-T14
JESD-609 code	e0
length	19.18 mm
Load capacitance (CL)	15 pF
Logic integrated circuit type	AND-OR-INVERT GATE
MaximumI(ol)	0.008 A
Number of functions	1
Number of entries	10
Number of terminals	14
Maximum operating temperature	70 °C
Minimum operating temperature
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Encapsulate equivalent code	DIP14,.3
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Maximum supply current (ICC)	2 mA
Prop。Delay @ Nom-Su	15 ns
propagation delay (tpd)	15 ns
Certification status	Not Qualified
Schmitt trigger	NO
Maximum seat height	5.08 mm
Maximum supply voltage (Vsup)	5.25 V
Minimum supply voltage (Vsup)	4.75 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	TTL
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	7.62 mm
Base Number Matches	1

DM74LS54N Related Products

	DM74LS54N	DM54LS54	DM54LS54J	DM54LS54W	DM74LS54	DM74LS54M
Description	4-WIDE, 2-Input AND-OR-INVERT Gate	4-WIDE, 2-Input AND-OR-INVERT Gate	4-WIDE, 2-Input AND-OR-INVERT Gate	4-WIDE, 2-Input AND-OR-INVERT Gate	4-WIDE, 2-Input AND-OR-INVERT Gate	4-WIDE, 2-Input AND-OR-INVERT Gate
Is it Rohs certified?	incompatible	-	incompatible	incompatible	-	incompatible
Maker	National Semiconductor（TI ）	-	National Semiconductor（TI ）	National Semiconductor（TI ）	-	National Semiconductor（TI ）
package instruction	DIP, DIP14,.3	-	CERAMIC, DIP-14	CERAMIC, FP-14	-	SOP, SOP14,.25
Reach Compliance Code	unknow	-	unknown	unknown	-	unknow
series	LS	-	LS	LS	-	LS
JESD-30 code	R-PDIP-T14	-	R-GDIP-T14	R-GDFP-F14	-	R-PDSO-G14
JESD-609 code	e0	-	e0	e0	-	e0
Logic integrated circuit type	AND-OR-INVERT GATE	-	AND-OR-INVERT GATE	AND-OR-INVERT GATE	-	AND-OR-INVERT GATE
MaximumI(ol)	0.008 A	-	0.004 A	0.004 A	-	0.008 A
Number of functions	1	-	1	1	-	1
Number of entries	10	-	10	10	-	10
Number of terminals	14	-	14	14	-	14
Maximum operating temperature	70 °C	-	125 °C	125 °C	-	70 °C
Package body material	PLASTIC/EPOXY	-	CERAMIC, GLASS-SEALED	CERAMIC, GLASS-SEALED	-	PLASTIC/EPOXY
encapsulated code	DIP	-	DIP	DFP	-	SOP
Encapsulate equivalent code	DIP14,.3	-	DIP14,.3	FL14,.3	-	SOP14,.25
Package shape	RECTANGULAR	-	RECTANGULAR	RECTANGULAR	-	RECTANGULAR
Package form	IN-LINE	-	IN-LINE	FLATPACK	-	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	-	NOT SPECIFIED	NOT SPECIFIED	-	NOT SPECIFIED
power supply	5 V	-	5 V	5 V	-	5 V
Maximum supply current (ICC)	2 mA	-	2 mA	2 mA	-	2 mA
propagation delay (tpd)	15 ns	-	15 ns	15 ns	-	15 ns
Certification status	Not Qualified	-	Not Qualified	Not Qualified	-	Not Qualified
Schmitt trigger	NO	-	NO	NO	-	NO
Maximum seat height	5.08 mm	-	5.08 mm	2.032 mm	-	1.75 mm
Maximum supply voltage (Vsup)	5.25 V	-	5.5 V	5.5 V	-	5.25 V
Minimum supply voltage (Vsup)	4.75 V	-	4.5 V	4.5 V	-	4.75 V
Nominal supply voltage (Vsup)	5 V	-	5 V	5 V	-	5 V
surface mount	NO	-	NO	YES	-	YES
technology	TTL	-	TTL	TTL	-	TTL
Temperature level	COMMERCIAL	-	MILITARY	MILITARY	-	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)	-	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	-	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE	-	THROUGH-HOLE	FLAT	-	GULL WING
Terminal pitch	2.54 mm	-	2.54 mm	1.27 mm	-	1.27 mm
Terminal location	DUAL	-	DUAL	DUAL	-	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED	-	NOT SPECIFIED	NOT SPECIFIED	-	NOT SPECIFIED
width	7.62 mm	-	7.62 mm	6.2865 mm	-	3.9 mm

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