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FX-700-DAT-PNKA-D2-AK

Description
Converter,
CategoryWireless rf/communication    Telecom circuit   
File Size398KB,8 Pages
ManufacturerVectron International, Inc.
Websitehttp://www.vectron.com/
Environmental Compliance
Download Datasheet Parametric View All

FX-700-DAT-PNKA-D2-AK Overview

Converter,

FX-700-DAT-PNKA-D2-AK Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
package instructionQCCN, LCC16,.3x.2,40
Reach Compliance Codecompliant
Other featuresalso works in 5v nominal supply voltage
appATM;SDH;SONET
JESD-30 codeR-CQCC-N16
JESD-609 codee4
length7.49 mm
Humidity sensitivity level1
Number of functions1
Number of terminals16
Maximum operating temperature70 °C
Minimum operating temperature
Package body materialCERAMIC
encapsulated codeQCCN
Encapsulate equivalent codeLCC16,.3x.2,40
Package shapeRECTANGULAR
Package formCHIP CARRIER
Maximum seat height2.13 mm
Maximum slew rate40 mA
Nominal supply voltage3.3 V
surface mountYES
Telecom integrated circuit typesATM/SONET/SDH SUPPORT CIRCUIT
Temperature levelCOMMERCIAL
Terminal surfaceGold (Au) - with Nickel (Ni) barrier
Terminal formNO LEAD
Terminal pitch1.02 mm
Terminal locationQUAD
width5.08 mm
FX-700
Low Jitter Frequency Translator
FX-700
Description
The FX-700 is a crystal-based frequency translator used in communications applications where low jitter is paramount.
Performance advantages include superior jitter performance, high output frequencies and small package size. Advanced custom
ASIC technology results in a highly robust, reliable and predictable device. The device is packaged in a 16 pad ceramic package
with a hermetic seam welded lid.
Features
5.0 x 7.5 mm, Hermetically sealed SMD package
Frequency Translation to 77.760 MHz
3.3 Volt or 5.0 Volt Supply
Tri-State Output allows board test
Lock Detect
Commercial or Industrial Temp. Range
CMOS Output
Absolute Pull Range Performance to +/-100 ppm
Capable of locking to an 8 kHz pulse/BITS clock
Product is free of lead and compliant to EC RoHS Directive
Applications
Frequency Translation, Clock Smoothing
Telecom - SONET/SDH/ATM
Datacom – DSLAM, DSLAR, Access Nodes
Base Station – GSM, CDMA
Cable Modem Head End
Block Diagram
LD
(8)
C1 Charge
Pump Out
(5)
Charge
Pump
VC
OUT
(3)
VC
IN
(16)
VCXO
VCXO
OUT
(13)
FIN
(6)
÷
(1-64)
Phase
Detector
& LD
÷
(1-16384)
FOUT
(10)
V
DD
(1)
V
DB
(11)
V
DA
(2)
V
DO
(14)
VCXO
IN
(12)
TRI-STATE
(4)
GND
(7, 9)
Figure 1. Functional block diagram
Page 1 of 8
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