74HC273BQ-Q100 datasheet, PDF - EEWORLD Datasheet

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74HC273BQ-Q100: DescriptionHC/UH SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20; Categorylogic logic; File Size147KB，19 Pages; ManufacturerNXP; Websitehttps://www.nxp.com

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74HC273BQ-Q100 Overview

HC/UH SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20

74HC273BQ-Q100 Parametric

Parameter Name	Attribute value
Maker	NXP
Parts packaging code	QFN
package instruction	HVQCCN,
Contacts	20
Reach Compliance Code	unknow
series	HC/UH
JESD-30 code	R-PQCC-N20
length	4.5 mm
Logic integrated circuit type	D FLIP-FLOP
Number of digits	8
Number of functions	1
Number of terminals	20
Maximum operating temperature	125 °C
Minimum operating temperature	-40 °C
Output polarity	TRUE
Package body material	PLASTIC/EPOXY
encapsulated code	HVQCCN
Package shape	RECTANGULAR
Package form	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
propagation delay (tpd)	225 ns
Filter level	AEC-Q100
Maximum seat height	1 mm
Maximum supply voltage (Vsup)	6 V
Minimum supply voltage (Vsup)	2 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	AUTOMOTIVE
Terminal form	NO LEAD
Terminal pitch	0.5 mm
Terminal location	QUAD
Trigger type	POSITIVE EDGE
width	2.5 mm
minfmax	24 MHz

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74HC273-Q100; 74HCT273-Q100

Octal D-type flip-flop with reset; positive-edge trigger

Rev. 1 — 19 June 2013

Product data sheet

1. General description

The 74HC273-Q100; 74HCT273-Q100 is an octal positive-edge triggered D-type flip-flop.

The device features clock (CP) and master reset (MR) inputs. The outputs Qn assume the

state of their corresponding Dn inputs that meet the set-up and hold time requirements on

the LOW-to-HIGH clock (CP) transition. A LOW on MR forces the outputs LOW

independently of clock and data inputs. Inputs include clamp diodes which enable the use

of current limiting resistors to interface inputs to voltages in excess of V

This product has been qualified to the Automotive Electronics Council (AEC) standard

Q100 (Grade 1) and is suitable for use in automotive applications.

2. Features and benefits



Automotive product qualification in accordance with AEC-Q100 (Grade 1)



Specified from

40 C

to +85

C

and from

40 C

to +125

C



Input levels:



For 74HC273-Q100: CMOS level



For 74HCT273-Q100: TTL level



Common clock and master reset



Eight positive edge-triggered D-type flip-flops



Complies with JEDEC standard no. 7A



ESD protection:



HBM JESD22-A114F exceeds 2000 V



MM JESD22-A115-A exceeds 200 V.



Multiple package options

3. Ordering information

Table 1.

Ordering information

Package

Temperature range Name

74HC273D-Q100

74HCT273D-Q100

74HC273PW-Q100

74HCT273PW-Q100

74HC273BQ-Q100

74HCT273BQ-Q100

40 C

to +125

C

40 C

to +125

C

TSSOP20

40 C

to +125

C

SO20

Description

plastic small outline package; 20 leads; body width

7.5 mm

plastic thin shrink small outline package; 20 leads;

body width 4.4 mm

Version

SOT163-1

SOT360-1

SOT764-1

Type number

DHVQFN20 plastic dual in-line compatible thermal enhanced

very thin quad flat package; no leads; 20 terminals;

body 2.5



4.5



0.85 mm

74HC273BQ-Q100 Related Products

	74HC273BQ-Q100	74HC273-Q100	74HC273D-Q100	74HC273PW-Q100	74HCT273-Q100	74HCT273BQ-Q100	74HCT273D-Q100	74HCT273PW-Q100
Description	HC/UH SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20	HC/UH SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20	HC/UH SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20	HC/UH SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20	HC/UH SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20	HC/UH SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20	HC/UH SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20	HC/UH SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20
series	HC/UH	HC/UH	HC/UH	HC/UH	HC/UH	HCT	HCT	HCT
Number of digits	8	8	8	8	8	8	8	8
Number of functions	1	1	1	1	1	1	1	1
Number of terminals	20	20	20	20	20	20	20	20
Maximum operating temperature	125 °C	125 Cel	125 °C	125 °C	125 Cel	125 °C	125 °C	125 °C
Minimum operating temperature	-40 °C	-40 Cel	-40 °C	-40 °C	-40 Cel	-40 °C	-40 °C	-40 °C
Output polarity	TRUE	TRUE	TRUE	TRUE	TRUE	TRUE	TRUE	TRUE
surface mount	YES	Yes	YES	YES	Yes	YES	YES	YES
Temperature level	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE
Terminal form	NO LEAD	GULL WING	GULL WING	GULL WING	GULL WING	NO LEAD	GULL WING	GULL WING
Terminal location	QUAD	pair	DUAL	DUAL	pair	QUAD	DUAL	DUAL
Trigger type	POSITIVE EDGE	POSITIVE edge	POSITIVE EDGE	POSITIVE EDGE	POSITIVE edge	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE
Maker	NXP	-	NXP	NXP	-	NXP	NXP	NXP
Parts packaging code	QFN	-	SOIC	TSSOP	-	QFN	SOIC	TSSOP
package instruction	HVQCCN,	-	SOP,	TSSOP,	-	HVQCCN,	SOP,	TSSOP,
Contacts	20	-	20	20	-	20	20	20
Reach Compliance Code	unknow	-	unknown	unknow	-	unknow	unknow	unknow
JESD-30 code	R-PQCC-N20	-	R-PDSO-G20	R-PDSO-G20	-	R-PQCC-N20	R-PDSO-G20	R-PDSO-G20
length	4.5 mm	-	12.8 mm	6.5 mm	-	4.5 mm	12.8 mm	6.5 mm
Logic integrated circuit type	D FLIP-FLOP	-	D FLIP-FLOP	D FLIP-FLOP	-	D FLIP-FLOP	D FLIP-FLOP	D FLIP-FLOP
Package body material	PLASTIC/EPOXY	-	PLASTIC/EPOXY	PLASTIC/EPOXY	-	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	HVQCCN	-	SOP	TSSOP	-	HVQCCN	SOP	TSSOP
Package shape	RECTANGULAR	-	RECTANGULAR	RECTANGULAR	-	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	-	SMALL OUTLINE	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	-	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	SMALL OUTLINE	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
propagation delay (tpd)	225 ns	-	225 ns	225 ns	-	45 ns	45 ns	45 ns
Filter level	AEC-Q100	-	AEC-Q100	AEC-Q100	-	AEC-Q100	AEC-Q100	AEC-Q100
Maximum seat height	1 mm	-	2.65 mm	1.1 mm	-	1 mm	2.65 mm	1.1 mm
Maximum supply voltage (Vsup)	6 V	-	6 V	6 V	-	5.5 V	5.5 V	5.5 V
Minimum supply voltage (Vsup)	2 V	-	2 V	2 V	-	4.5 V	4.5 V	4.5 V
Nominal supply voltage (Vsup)	5 V	-	5 V	5 V	-	5 V	5 V	5 V
technology	CMOS	-	CMOS	CMOS	-	CMOS	CMOS	CMOS
Terminal pitch	0.5 mm	-	1.27 mm	0.65 mm	-	0.5 mm	1.27 mm	0.65 mm
width	2.5 mm	-	7.5 mm	4.4 mm	-	2.5 mm	7.5 mm	4.4 mm
minfmax	24 MHz	-	24 MHz	24 MHz	-	20 MHz	20 MHz	20 MHz

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