Changes to Ordering Guide .......................................................... 25
4/05—Revision 0: Initial Version
Rev. B | Page 2 of 28
Data Sheet
SPECIFICATIONS
VDD = 4.5 V to 5.5 V, VIO = 2.3 V to VDD, V
REF
= VDD, T
A
= –40°C to +85°C, unless otherwise noted.
Table 2.
Parameter
RESOLUTION
ANALOG INPUT
Voltage Range
Absolute Input Voltage
Common-Mode Input Range
Analog Input CMRR
Leakage Current at 25°C
Input Impedance
ACCURACY
No Missing Codes
Differential Linearity Error
Integral Linearity Error
Transition Noise
Gain Error
2
, T
MIN
to T
MAX
Gain Error Temperature Drift
Zero Error
2
, T
MIN
to T
MAX
Zero Temperature Drift
Power Supply Sensitivity
THROUGHPUT
Conversion Rate
Transient Response
AC ACCURACY
Dynamic Range
Signal-to-Noise
Spurious-Free Dynamic Range
Total Harmonic Distortion
Signal-to-(Noise + Distortion)
Intermodulation Distortion
4
1
2
AD7688
Conditions
Min
16
−V
REF
−0.1
0
Typ
Max
Unit
Bits
V
V
V
dB
nA
IN+ − IN−
IN+, IN−
IN+, IN−
f
IN
= 250 kHz
Acquisition phase
V
REF
/2
65
1
See the Analog Input section
+V
REF
V
REF
+ 0.1
V
REF
/2 + 0.1
16
−1
−1.5
REF = VDD = 5 V
VDD = 5 V ± 5%
0
Full-scale step
V
REF
= 5 V
f
IN
= 20 kHz, V
REF
= 5 V
f
IN
= 20 kHz, V
REF
= 5 V
f
IN
= 20 kHz
f
IN
= 20 kHz
f
IN
= 20 kHz, V
REF
= 5 V
f
IN
= 20 kHz, V
REF
= 5 V, −60 dB input
95.8
94
±0.4
±0.4
0.4
±2
±0.3
±0.1
±0.3
±0.05
+1
+1.5
±6
±1.6
Bits
LSB
1
LSB
LSB
LSB
ppm/°C
mV
ppm/°C
LSB
kSPS
ns
dB
3
dB
dB
dB
dB
dB
dB
dB
500
400
96.5
95.5
92.5
−118
−118
95
36.5
115
93.5
LSB means least significant bit. With the ±5 V input range, one LSB is 152.6 µV.
See the Terminology section. These specifications do include full temperature range variation but do not include the error contribution from the external reference.
3
All specifications in dB are referred to a full-scale input FS. Tested with an input signal at 0.5 dB below full-scale, unless otherwise specified.
4
f
IN1
= 21.4 kHz, f
IN2
= 18.9 kHz, each tone at −7 dB below full-scale.
Rev. B | Page 3 of 28
AD7688
VDD = 4.5 V to 5.5 V, VIO = 2.3 V to VDD, V
REF
= VDD, T
A
= –40°C to +85°C, unless otherwise noted.
Table 3.
Parameter
REFERENCE
Voltage Range
Load Current
SAMPLING DYNAMICS
−3 dB Input Bandwidth
Aperture Delay
DIGITAL INPUTS
Logic Levels
V
IL
V
IH
I
IL
I
IH
DIGITAL OUTPUTS
Data Format
Pipeline Delay
V
OL
V
OH
POWER SUPPLIES
VDD
VIO
VIO Range
Standby Current
1, 2
Power Dissipation
Conditions
Min
0.5
500 kSPS, REF = 5 V
100
9
2.5
Typ
Max
VDD + 0.3
Data Sheet
Unit
V
µA
MHz
ns
VDD = 5 V
–0.3
0.7 × VIO
−1
−1
+0.3 × VIO
VIO + 0.3
+1
+1
V
V
µA
µA
I
SINK
= +500 µA
I
SOURCE
= −500 µA
Specified performance
Specified performance
VDD and VIO = 5 V, 25°C
VDD = 5 V, 100 SPS throughput
VDD = 5 V, 100 kSPS throughput
VDD = 5 V, 500 kSPS throughput
T
MIN
to T
MAX
Serial 16 bits twos complement
Conversion results available immediately
after completed conversion
0.4
VIO − 0.3
4.5
2.3
1.8
1
3.75
3.75
5.5
VDD + 0.3
VDD + 0.3
50
4.3
21.5
+85
V
V
V
V
V
nA
µW
mW
mW
°C
TEMPERATURE RANGE
3
Specified Performance
1
2
−40
With all digital inputs forced to VIO or GND as required.
During acquisition phase.
3
Contact sales for extended temperature range.
Rev. B | Page 4 of 28
Data Sheet
TIMING SPECIFICATIONS
AD7688
−40°C to +85°C, VDD = 4.5 V to 5.5 V, VIO = 2.3 V to 5.5 V or VDD + 0.3 V, whichever is the lowest, unless otherwise stated.
See Figure 3 and Figure 4 for load conditions.
Table 4.
Parameter
Conversion Time: CNV Rising Edge to Data Available
Acquisition Time
Time Between Conversions
CNV Pulse Width (CS Mode)
SCK Period (CS Mode)
SCK Period (Chain Mode)
VIO Above 4.5 V
VIO Above 3 V
VIO Above 2.7 V
VIO Above 2.3 V
SCK Low Time
SCK High Time
SCK Falling Edge to Data Remains Valid
SCK Falling Edge to Data Valid Delay
VIO Above 4.5 V
VIO Above 3 V
VIO Above 2.7 V
VIO Above 2.3 V
CNV or SDI Low to SDO D15 MSB Valid (CS Mode)
VIO Above 4.5 V
VIO Above 2.7 V
VIO Above 2.3 V
CNV or SDI High or Last SCK Falling Edge to SDO High Impedance (CS Mode)
SDI Valid Setup Time from CNV Rising Edge (CS Mode)
SDI Valid Hold Time from CNV Rising Edge (CS Mode)
SCK Valid Setup Time from CNV Rising Edge (Chain Mode)
SCK Valid Hold Time from CNV Rising Edge (Chain Mode)
SDI Valid Setup Time from SCK Falling Edge (Chain Mode)
SDI Valid Hold Time from SCK Falling Edge (Chain Mode)
SDI High to SDO High (Chain Mode with BUSY indicator)
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