System Power Supply for TV Series
FET Controller Type
3ch System Power Supply ICs
BD8629FS
No.09034EAT07
●Description
BD8629FS has realized the high performance and reliability required as a power supply for thin-screen TV.
With built-in FET 1ch current mode control, the DC/DC Converter series has the advantage of high-speed load response and
wide phase margin.
Due to the high-speed load response, it is most suitable for TV-purpose processors with increasingly high performance, and
due to the wide phase margin it leaves a good margin for board pattern & constant setting and so facilitates its application
design.
As a high-reliability design, it has various built-in protection circuits (overcurrent protection, output voltage abnormal
protection, thermal protection, and off-latch function at the time of abnormality etc.), therefore as an advantage it does not
easily damage in every possible abnormal condition such as all-pin short circuit test etc. and hence most suitable for
thin-screen TV which requires the high reliability.
●Features
1)
High efficiency in all load area
2) 2.0A output current
3) Low RDS(ON) internal switches (PchMOS:170mΩ, NchMOS:130mΩ)
4) ±1% reference voltage accuracy
5) Programmable frequency : 250kHz-1MHz
6) Terminal RT OPEN/SHORT detecting function
7) Over current protection function
8) Output over voltage/low voltage protection function (over : FB > VREF +60mV , low : FB < VREF -60mV)
9) Timer off latch function in abnormal circumstances
10) Thermal shutdown function
11) Under voltage protection
12) Soft start/start delay circuit
13) Soft start time out function
14) SSOP-A16 package
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© 2009 ROHM Co., Ltd. All rights reserved.
1/11
2009.05 - Rev.A
BD8629FS
●Electrical
characteristic
(Unless otherwise noted Ta=25℃, V
IN
=5.6V)
Technical Note
Specification value
UNIT
Condition
MIN
TYP
MAX
VIN supply current (operating)
I
Q_active
-
1.3
2.0
mA
V
FB
= 0.83V, V
FC
= 1V
V
EN
= 0V
μA
VIN supply current (standby)
I
Q_stby
-
350
700
Reference voltage (VREF)
V
REF
0.792
0.8
0.808
V
Output rise detection voltage
V
OVP
30
60
90
mV
Monitoring FB terminal
Output decrease detection voltage
V
LVP
-90
-60
-30
mV
Monitoring FB terminal
Terminal PDET output current
I
PDET
1
-
-
mA
V
PDET
< 0.5V
R
OSC
= 220kΩ
Oscillation frequency
f
OSC
500
550
600
kHz
Pch FET ON resistance
R
PFET
-
170
240
mΩ
I
SW
= 1A
Nch FET ON resistance
R
NFET
-
130
200
mΩ
I
SW
= -1A
UVLO voltage
V
UVLO
3.8
4.0
4.2
V
μA
SW leak current
I
LSW
-
0
1
V
EN
= 0V, V
IN
= 6V
EN terminal H threshold voltage
V
ENH
2.0
-
-
V
EN terminal L threshold voltage
V
ENL
-
-
0.5
V
μA
SS/DELAY terminal source current
I
SSSO
2
4
6
V
FB
:FB terminal voltage, V
EN
:EN terminal voltage, V
FC
:FC terminal voltage, V
PDET
: PDET terminal voltage
Current capability should not exceed Pd.
Parameter
Symbol
Permissible loss
1
(70mm×70mm, thickness 1.6mm, and one layer glass epoxy substrates)
When mounting substrate
Permissible loss
:
PD
[W]
0.75
0.5
0.25
0
0
25
50
75
100
125
150
Surrounding temperature
:
Ta [℃]
Fig. 1 heat decrease curve
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© 2009 ROHM Co., Ltd. All rights reserved.
2/11
2009.05 - Rev.A
BD8629FS
●Block
Diagram
14
SS/DELAY
VIN
Technical Note
16 RT
15 FC
13 EN
12 REG
11
10
REG
OSC
en
enable
PWM
CONTROL
REG
VIN
REG
Detec t Abnor ma l
Volt ag
e
and Star t error
Er r A M P
SG D
1
N
PDET
3
SW
4
S
hut
Down
REG
5
6
6
7
SW
Pre drive
FB 2
Fig.2 Block diagram
●
Pin description
No.
Symbol
1
SGND
2
FB
3
4
5
6
7
8
9
10
11
12
13
14
15
16
PDET
SW
PGND
PGND
SW
SW
VIN
VIN
VIN
REG
EN
Description
Signal GND terminal
Feed back terminal
Off latch signal output
Output terminal
Power GND terminal
Output terminal
Power supply input terminal
Explanation
Small signal system GND
Output voltage detection
Reset output
Switching output
GND for power MOSFET
Power Mos output
Power supply input. The decoupling is done to
PGND
Internal regulator
ON/OFF control for device operation
The soft start time is adjusted with the connected
capacitor
Error amplifier phase compensation point
The switching frequency is set by the connected
resistance
Internal regulator
Enable input
Soft start adjustment capacity connection
SS/DELAY
terminal
FC
Error amplifier output
Frequency adjustment resistance connection
RT
terminal
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© 2009 ROHM Co., Ltd. All rights reserved.
ND
PG
8
9
3/11
2009.05 - Rev.A
BD8629FS
●Pin
equivalence circuit diagram
No.
Symbol
1
SGND
Technical Note
Explanation
Terminal equivalent circuit diagram
GND (connected 0V)
VIN
2
FB
Output voltage detection terminal
2
SGND
3
PDET
Off latch signal output terminal
VIN
4,7,8
SW
Output terminal
4
5
7
6
8
7
PGND
5,6
PGND
Power GND
(Same voltage as SGND)
9,10,11
VIN
Power supply input terminal
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© 2009 ROHM Co., Ltd. All rights reserved.
4/11
2009.05 - Rev.A
BD8629FS
No.
Symbol
Explanation
Technical Note
Terminal equivalent circuit diagram
12
REG
Internal regulator output terminal
13
EN
Enable terminal
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© 2009 ROHM Co., Ltd. All rights reserved.
5/11
2009.05 - Rev.A