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EMG2DXV5

Description
Dual Bias Resistor Transistors
File Size110KB,7 Pages
ManufacturerON Semiconductor
Websitehttp://www.onsemi.cn
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EMG2DXV5 Overview

Dual Bias Resistor Transistors

EMG2DXV5, EMG5DXV5
Dual Bias Resistor
Transistors
NPN Silicon Surface Mount Transistors
with Monolithic Bias Resistor Network
This new series of digital transistors is designed to replace a single
device and its external resistor bias network. The BRT (Bias Resistor
Transistor) contains a single transistor with a monolithic bias network
consisting of two resistors; a series base resistor and a base−emitter
resistor. The BRT eliminates these individual components by
integrating them into a single device. The use of a BRT can reduce
both system cost and board space. The device is housed in the
SOT−553 package which is designed for low power surface mount
applications.
Features
http://onsemi.com
NPN SILICON
BIAS RESISTOR
TRANSISTORS
(5)
(4)
Simplifies Circuit Design
Reduces Board Space
Reduces Component Count
Moisture Sensitivity Level: 1
Available in 8 mm, 7 inch Tape and Reel
Lead−Free Solder Plating
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Rating
Symbol
V
CBO
V
CEO
I
C
Value
50
50
100
Unit
Vdc
Vdc
mAdc
Q1
R2
R1
(1)
(2)
Q2
R2
R1
(3)
MAXIMUM RATINGS
(T
A
= 25°C unless otherwise noted)
Collector-Base Voltage
Collector-Emitter Voltage
Collector Current
5
1
SOT−553
CASE 463B
THERMAL CHARACTERISTICS
Characteristic
Total Device Dissipation
T
A
= 25°C
Derate above 25°C
Thermal Resistance
Junction-to-Ambient
Thermal Resistance
Junction-to-Lead
Junction and Storage
Temperature Range
Symbol
P
D
Max
230 (Note 1)
338 (Note 2)
1.8 (Note 1)
2.7 (Note 2)
540 (Note 1)
370 (Note 2)
264 (Note 1)
287 (Note 2)
−55
to +150
Unit
mW
°C/W
MARKING
DIAGRAM
5
XXM
G
G
1
R
qJA
R
qJL
T
J
, T
stg
°C/W
°C/W
°C
XX = UF (EMG5)
UP (EMG2)
M = Date Code
G
= Pb−Free Package
(Note: Microdot may be in either location)
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. FR−4 @ Minimum Pad
2. FR−4 @ 1.0 x 1.0 inch Pad
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
©
Semiconductor Components Industries, LLC, 2013
March, 2013
Rev. 1
1
Publication Order Number:
EMG5DXV5/D

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