EMG2DXV5, EMG5DXV5
Dual Bias Resistor
Transistors
NPN Silicon Surface Mount Transistors
with Monolithic Bias Resistor Network
This new series of digital transistors is designed to replace a single
device and its external resistor bias network. The BRT (Bias Resistor
Transistor) contains a single transistor with a monolithic bias network
consisting of two resistors; a series base resistor and a base−emitter
resistor. The BRT eliminates these individual components by
integrating them into a single device. The use of a BRT can reduce
both system cost and board space. The device is housed in the
SOT−553 package which is designed for low power surface mount
applications.
Features
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NPN SILICON
BIAS RESISTOR
TRANSISTORS
(5)
(4)
•
•
•
•
•
•
•
Simplifies Circuit Design
Reduces Board Space
Reduces Component Count
Moisture Sensitivity Level: 1
Available in 8 mm, 7 inch Tape and Reel
Lead−Free Solder Plating
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Rating
Symbol
V
CBO
V
CEO
I
C
Value
50
50
100
Unit
Vdc
Vdc
mAdc
Q1
R2
R1
(1)
(2)
Q2
R2
R1
(3)
MAXIMUM RATINGS
(T
A
= 25°C unless otherwise noted)
Collector-Base Voltage
Collector-Emitter Voltage
Collector Current
5
1
SOT−553
CASE 463B
THERMAL CHARACTERISTICS
Characteristic
Total Device Dissipation
T
A
= 25°C
Derate above 25°C
Thermal Resistance
−
Junction-to-Ambient
Thermal Resistance
−
Junction-to-Lead
Junction and Storage
Temperature Range
Symbol
P
D
Max
230 (Note 1)
338 (Note 2)
1.8 (Note 1)
2.7 (Note 2)
540 (Note 1)
370 (Note 2)
264 (Note 1)
287 (Note 2)
−55
to +150
Unit
mW
°C/W
MARKING
DIAGRAM
5
XXM
G
G
1
R
qJA
R
qJL
T
J
, T
stg
°C/W
°C/W
°C
XX = UF (EMG5)
UP (EMG2)
M = Date Code
G
= Pb−Free Package
(Note: Microdot may be in either location)
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. FR−4 @ Minimum Pad
2. FR−4 @ 1.0 x 1.0 inch Pad
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
©
Semiconductor Components Industries, LLC, 2013
March, 2013
−
Rev. 1
1
Publication Order Number:
EMG5DXV5/D
EMG2DXV5, EMG5DXV5
DEVICE MARKING AND RESISTOR VALUES
Device
EMG2DXV5
EMG5DXV5
Package
SOT−553
SOT−553
Marking
UP
UF
R1 (K)
47
10
R2 (K)
47
47
ELECTRICAL CHARACTERISTICS
(T
A
= 25°C unless otherwise noted)
Characteristic
OFF CHARACTERISTICS (Q1 & Q2)
Collector-Base Cutoff Current (V
CB
= 50 V, I
E
= 0)
Collector-Emitter Cutoff Current (V
CE
= 50 V, I
B
= 0)
Emitter-Base Cutoff Current (V
EB
= 6.0 V, I
C
= 0)
EMG2DXV5
EMG5DXV5
I
CBO
I
CEO
I
EBO
V
(BR)CBO
V
(BR)CEO
−
−
−
−
50
50
−
−
−
−
−
−
100
500
0.1
0.2
−
−
nAdc
nAdc
mAdc
Vdc
Vdc
Symbol
Min
Typ
Max
Unit
Collector-Base Breakdown Voltage (I
C
= 10
mA,
I
E
= 0)
Collector-Emitter Breakdown Voltage (Note 3)
(I
C
= 2.0 mA, I
B
= 0)
ON CHARACTERISTICS (Q1 & Q2)
(Note 3)
DC Current Gain (V
CE
= 10 V, I
C
= 5.0 mA)
EMG2DXV5
EMG5DXV5
h
FE
V
CE(sat)
V
OL
80
80
−
−
−
4.9
32.9
7.0
0.8
0.17
140
140
−
−
−
−
47
10
1.0
0.21
−
−
0.25
0.2
0.2
−
61.1
13
1.2
0.25
Vdc
Vdc
Collector-Emitter Saturation Voltage (IC = 10 mA, I
B
= 0.3 mA)
Output Voltage (on)
(V
CC
= 5.0 V, V
B
= 3.5 V, R
L
= 1.0 kW)
(V
CC
= 5.0 V, V
B
= 2.5 V, R
L
= 1.0 kW)
EMG2DXV5
EMG5DXV5
Output Voltage (off) (V
CC
= 5.0 V, V
B
= 0.5 V, R
L
= 1.0 kW)
Input Resistor
Resistor Ratio
EMG2DXV5
EMG5DXV5
EMG2DXV5
EMG5DXV5
V
OH
R
1
R
1
/R
2
Vdc
kW
3. Pulse Test: Pulse Width < 300
ms,
Duty Cycle < 2.0%
350
P
D
, POWER DISSIPATION (mW)
300
250
200
150
100
50
0
−50
R
qJA
= 370°C/W
0
50
100
T
A
, AMBIENT TEMPERATURE (°C)
150
Figure 1. Derating Curve
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EMG2DXV5, EMG5DXV5
TYPICAL ELECTRICAL CHARACTERISTICS — EMG2DXV5
VCE(sat) , MAXIMUM COLLECTOR VOLTAGE (VOLTS)
10
I
C
/I
B
= 10
1000
hFE , DC CURRENT GAIN (NORMALIZED)
V
CE
= 10 V
T
A
= 75°C
25°C
-25°C
100
1
25°C
75°C
T
A
= -25°C
0.1
0.01
0
20
40
I
C
, COLLECTOR CURRENT (mA)
50
10
1
10
I
C
, COLLECTOR CURRENT (mA)
100
Figure 2. V
CE(sat)
versus I
C
Figure 3. DC Current Gain
1
f = 1 MHz
I
E
= 0 V
T
A
= 25°C
100
75°C
IC, COLLECTOR CURRENT (mA)
10
25°C
T
A
= -25°C
0.8
Cob , CAPACITANCE (pF)
0.6
1
0.4
0.1
0.2
0.01
V
O
= 5 V
0
2
4
6
V
in
, INPUT VOLTAGE (VOLTS)
8
10
0
0
10
20
30
40
V
R
, REVERSE BIAS VOLTAGE (VOLTS)
50
0.001
Figure 4. Output Capacitance
Figure 5. Output Current versus Input Voltage
100
V
O
= 0.2 V
V in , INPUT VOLTAGE (VOLTS)
T
A
= -25°C
10
25°C
75°C
1
0.1
0
10
20
30
40
50
I
C
, COLLECTOR CURRENT (mA)
Figure 6. Input Voltage versus Output Current
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EMG2DXV5, EMG5DXV5
TYPICAL ELECTRICAL CHARACTERISTICS
−
EMG5DXV5
VCE(sat) , MAXIMUM COLLECTOR VOLTAGE (VOLTS)
1
I
C
/I
B
= 10
T
A
= -25°C
250
hFE, DC CURRENT GAIN
25°C
0.1
75°C
25°C
200
-25°C
150
100
50
0.001
0
300
V
CE
= 10
T
A
= 75°C
0.01
0
20
40
60
I
C
, COLLECTOR CURRENT (mA)
80
1
2
4
6
8 10 15 20 40 50 60 70 80
I
C
, COLLECTOR CURRENT (mA)
90 100
Figure 7. V
CE(sat)
versus I
C
Figure 8. DC Current Gain
4
3.5
Cob , CAPACITANCE (pF)
3
2.5
2
1.5
1
0.5
0
0
2
4
6 8 10 15 20 25 30 35 40
V
R
, REVERSE BIAS VOLTAGE (VOLTS)
45
50
f = 1 MHz
l
E
= 0 V
T
A
= 25°C
100
75°C
IC, COLLECTOR CURRENT (mA)
25°C
T
A
= -25°C
10
V
O
= 5 V
1
0
2
4
6
V
in
, INPUT VOLTAGE (VOLTS)
8
10
Figure 9. Output Capacitance
Figure 10. Output Current versus Input Voltage
10
V
O
= 0.2 V
V in , INPUT VOLTAGE (VOLTS)
T
A
= -25°C
25°C
75°C
1
0.1
0
10
20
30
I
C
, COLLECTOR CURRENT (mA)
40
50
Figure 11. Input Voltage versus Output Current
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4
EMG2DXV5, EMG5DXV5
TYPICAL APPLICATIONS FOR NPN BRTs
+12 V
ISOLATED
LOAD
FROM
mP
OR
OTHER LOGIC
Figure 12. Level Shifter: Connects 12 or 24 Volt Circuits to Logic
+12 V
V
CC
OUT
IN
LOAD
Figure 13. Open Collector Inverter:
Inverts the Input Signal
Figure 14. Inexpensive, Unregulated Current Source
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