SN74LV32ATPWRQ1 datasheet, PDF

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SN74LV32ATPWRQ1: DescriptionLogic Gates Quad 2 Input Pos OR Gate; Categorylogic logic; File Size199KB，10 Pages; ManufacturerTexas Instruments; Websitehttp://www.ti.com.cn/; Environmental Compliance

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SN74LV32ATPWRQ1 Overview

Logic Gates Quad 2 Input Pos OR Gate

SN74LV32ATPWRQ1 Parametric

Parameter Name	Attribute value
Brand Name	Texas Instruments
Is it lead-free?	Contains lead
Is it Rohs certified?	conform to
Maker	Texas Instruments
Parts packaging code	TSSOP
package instruction	TSSOP, TSSOP14,.25
Contacts	14
Reach Compliance Code	unknow
series	LV/LV-A/LVX/H
JESD-30 code	R-PDSO-G14
length	5 mm
Load capacitance (CL)	50 pF
Logic integrated circuit type	OR GATE
MaximumI(ol)	0.006 A
Number of functions	4
Number of entries	2
Number of terminals	14
Maximum operating temperature	105 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	TSSOP
Encapsulate equivalent code	TSSOP14,.25
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
method of packing	TR
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	3.3 V
Prop。Delay @ Nom-Su	13 ns
propagation delay (tpd)	20 ns
Certification status	Not Qualified
Schmitt trigger	NO
Filter level	AEC-Q100
Maximum seat height	1.2 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	2 V
Nominal supply voltage (Vsup)	2.5 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	4.4 mm
Base Number Matches	1

SN74LV32ATPWRQ1 Related Products

	SN74LV32ATPWRQ1	SN74LV32ATPWRG4Q1
Description	Logic Gates Quad 2 Input Pos OR Gate	Automotive Catalog Quadruple 2-Input Positive-OR Gates 14-TSSOP -40 to 105
Brand Name	Texas Instruments	Texas Instruments
Is it lead-free?	Contains lead	Lead free
Is it Rohs certified?	conform to	conform to
Maker	Texas Instruments	Texas Instruments
Parts packaging code	TSSOP	TSSOP
package instruction	TSSOP, TSSOP14,.25	TSSOP, TSSOP14,.25
Contacts	14	14
Reach Compliance Code	unknow	compli
series	LV/LV-A/LVX/H	LV/LV-A/LVX/H
JESD-30 code	R-PDSO-G14	R-PDSO-G14
length	5 mm	5 mm
Load capacitance (CL)	50 pF	50 pF
Logic integrated circuit type	OR GATE	OR GATE
MaximumI(ol)	0.006 A	0.012 A
Number of functions	4	4
Number of entries	2	2
Number of terminals	14	14
Maximum operating temperature	105 °C	105 °C
Minimum operating temperature	-40 °C	-40 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	TSSOP	TSSOP
Encapsulate equivalent code	TSSOP14,.25	TSSOP14,.25
Package shape	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
method of packing	TR	TR
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	260
power supply	3.3 V	3.3 V
Prop。Delay @ Nom-Su	13 ns	13 ns
propagation delay (tpd)	20 ns	20 ns
Certification status	Not Qualified	Not Qualified
Schmitt trigger	NO	NO
Filter level	AEC-Q100	AEC-Q100
Maximum seat height	1.2 mm	1.2 mm
Maximum supply voltage (Vsup)	5.5 V	5.5 V
Minimum supply voltage (Vsup)	2 V	2 V
Nominal supply voltage (Vsup)	2.5 V	2.5 V
surface mount	YES	YES
technology	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL
Terminal form	GULL WING	GULL WING
Terminal pitch	0.65 mm	0.65 mm
Terminal location	DUAL	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED
width	4.4 mm	4.4 mm
Base Number Matches	1	1

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