CS5661
CS5661
Description
The CS5661 is a high performance,
fixed frequency, dual current mode
controller specifically designed for
Off-Line and DC to DC converter
applications. It offers the designer a
cost effective solution with minimal
external components. This integrat-
ed circuit features a unique oscilla-
tor for precise duty cycle limit and
frequency control, a temperature
compensated reference, two high
gain error amplifiers, two current
sensing comparators, and two high
DE
SI
GN
SYNC
1
C
T
2
R
T
3
High Performance Dual Channel
Current Mode Controller with ENABLE
Features
RE
CO
MM
EN
DE
D
V
REF
SYNC
C
T
R
T
NO
T
AR
CH
IV
FO
E
R
N
Block Diagram
V
CC
5.0V Ref
V
CC
Undervoltage
Lockout
V
REF
Undervoltage
Lockout
Latching
PWM 1
Oscillator
Also included are protective fea-
tures consisting of input and refer-
ence undervoltage lockouts, each
with hysteresis, cycle-by-cycle cur-
rent limiting, and a latch for single
pulse metering of each output.
The CS5661 is pin compatible with
the MC34065L.
EW
V
OUT1
Sense
1
V
OUT2
current totem pole outputs ideally
suited for driving power MOSFETs.
V
OUT2
output is switchable via the
ENABLE
2
pin.
s
Oscillator has Precise
Duty Cycle
Limit and Frequency
Control
s
500kHz Current Mode
Operation
s
Automatic Feed Forward
Compensation
s
Separate Latching PWMs
for Cycle-By-Cycle
Current Limiting
s
Internally Trimmed
Reference with
Undervoltage Lockout
s
Switchable Second
Output
s
Two High Current Totem
Pole Outputs
s
Input Undervoltage
Lockout with Hysteresis
s
8.4V Start Up Voltage
Threshold
+
Package Options
16 Lead SO Wide
V
FB1
-
COMP
1
DE
VI
CE
Error
Amp 1
ENABLE
2
Latching
PWM 2
16
15
14
13
12
11
10
9
V
CC
V
REF
ENABLE
2
V
FB2
COMP
2
SENSE
2
V
OUT2
Pwr Gnd
V
FB2
+
-
Error
Amp 2
Sense
2
V
FB1
4
COMP
1
5
SENSE
1
6
V
OUT1
7
COMP
2
Gnd
Pwr Gnd
Gnd
8
ON Semiconductor
2000 South County Trail, East Greenwich, RI 02818
Tel: (401)885–3600 Fax: (401)885–5786
N. American Technical Support: 800-282-9855
Web Site: www.cherry–semi.com
December, 2001 - Rev. 3
1
CS5661
Absolute Maximum Ratings
Output Current, Source or Sink (Note 1) ......................................................................................................................400mA
Output Energy (capacitive load per cycle) .......................................................................................................................5.0µJ
Current Sense, Enable and Voltage ......................................................................................................................-0.3 to +5.5V
Feedback Inputs
Sync Input – High State (Voltage) ......................................................................................................................................5.5V
– Low State (Reverse Current) ...................................................................................................................-5.0mA
Error Amp Output Sink Current......................................................................................................................................10mA
Storage Temperature Range ................................................................................................................................-65 to +150°C
Operating Junction Temperature...................................................................................................................................+150°C
Lead Temperature Soldering
Reflow (SMD styles only) ......................................................................................60 sec. max above 183°C, 230°C peak
ESD Capability (Human Body Model) ...................................................................................................................................2kV
Electrical Characteristics:
(V
CC
= 15V, R
T
= 8.2kΩ, C
T
= 3.3nF, for typical values T
A
= 25°C, for min/max values -40°C < T
A
< 85°C,
unless otherwise stated.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
s
Reference Section
Reference Output Voltage,
V
REF
Line Regulation
Load Regulation
Total Output Variation over
Line, Load and Temperature
Output Short Circuit Current
s
Oscillator and PWM Sections
Total Frequency Variation
over Line and Temperature
Frequency Change with
Voltage
Duty Cycle at each Output
SYNC Current
11V
≤
V
CC
≤
15V, T
low
≤
T
A
≤
T
high
11V
≤
V
CC
≤
15V
Maximum
High State V
IN
= 2.4V
Low State V
IN
= 0.8V
46.0
46.0
49.5
0.2
49.5
170
80
53.0
1.0
52.0
250
160
kHz
%
%
µA
I
OUT
= 1.0mA, T
J
= 25°C
11V
≤
V
CC
≤
15V
1.0mA
≤
I
OUT
≤
10mA
4.85
30
100
4.9
5.0
2.0
3.0
5.1
20.0
30.0
5.15
V
mV
mV
V
mA
s
Error Amplifiers
Voltage Feedback Input
Input Bias Current
Open-Loop Voltage Gain
Unity Gain Bandwidth
Output Current
Output Voltage Swing
V
OUT
= 2.5V
V
FB
= 5.0V
2.0V
≤
V
OUT
≤
4.0V
T
J
= 25°C (Note 5)
Source V
OUT
= 3.0V, V
FB
= 2.3V
Sink V
OUT
= 1.2V, V
FB
= 2.7V
High State R
L
= 15kΩ to ground,
V
FB
= 2.3V
Low State R
L
= 15kΩ to V
REF
,
V
FB
= 2.7V
65
0.7
60
-0.45
2.00
5.0
2.42
2.50
-0.1
100
1.0
90
-1.00
12.00
6.2
0.8
1.1
2.58
-1.0
V
µA
dB
MHz
dB
mA
mA
V
V
Power Supply Rejection Ratio V
CC
= 11V to 15V
2
CS5661
Electrical Characteristics:
(V
CC
= 15V, R
T
= 8.2kΩ, C
T
= 3.3nF, for typical values T
A
= 25°C, for min/max values -40°C < T
A
< 85°C,
unless otherwise stated.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
s
Current Sense Section
Current Sense Input
Voltage Gain
Maximum Current Sense
Input Threshold
Input Bias Current
Propagation Delay
s
Output 2 Enable Pin
Enable Pin Voltage
High State
Low State
Low State Input Current
s
Drive Outputs
Output Voltage
Low State
High State
Output Voltage with
UVLO Activated
Output Voltage Rise Time
Output Voltage Fall Time
I
SINK
= 20mA
I
SINK
= 200mA
I
SOURCE
= 20mA
I
SOURCE
= 200mA
(V
CC
= 6.0V, I
SINK
= 1.0mA)
(C
L
= 1.0nF) Note 5
(C
L
= 1.0nF) Note 5
0.1
1.6
13.5
13.4
0.1
28
25
0.4
2.5
V
V
V
V
V
ns
ns
OUTPUT
2
enabled
OUTPUT
2
disabled
V
IL
= 0V
3.5
0.0
100
250
V
REF
1.5
400
V
V
V
µA
Current Sense Input to Output (Note 5)
(Notes 3 and 4)
(Note 3)
2.75
0.9
3.00
1.0
-2.0
150
3.25
1.1
-30.0
300
V/V
V
µA
ns
13.0
12.0
1.1
150
150
s
Undervoltage Lockout Section
Start-Up Threshold
Minimum Operating Voltage
After Turn-On
Hysteresis
s
Total Device
Start-Up Current
Operating Current
V
CC
= 6V
0.6
20
1.0
25
mA
mA
6.8
7.8
0.6
8.8
V
V
7.4
8.4
9.4
V
Note 1: Maximum package power dissipation limits must be observed.
Note 2: Low duty cycle pulse techniques are used during test to maintain
junction temperature as close to ambient as possible:
T
low
= -40°C ; T
high
=+85°C
Note 3: This parameter is measured at latch trip point with V
FB
=0V.
Note 4: Comparator gain is defined as:
AV=
∆V
Compensation
∆V
Current Sense
Note 5: These parameters are guaranteed by design but not 100% tested
in production.
3
CS5661
Package Pin Description
PACKAGE PIN #
PIN SYMBOL
FUNCTION
16 Lead SO Wide
1
SYNC
A positive going pulse applied to this input will synchronize the
oscillator. A DC voltage within the range of 2.4V to 5.5V will
inhibit the oscillator.
Timing capacitor C
T
connects pin to ground setting oscillator
frequency.
Resistor R
T
connects to ground setting the charge current for C
T
.
Its value must be between 4.0kΩ and 16kΩ.
The inverting input of error amplifier 1. Normally it is connect-
ed to the switching power supply output.
The output of error amplifier 1, for loop compensation.
Output 1 pulse by pulse current limit.
Drives the power switch at output 1.
Logic ground
Power ground. Power device return is connected to this pin.
Drives the power switch at output 2.
Output 2 pulse by pulse current limit.
Output of error amplifier 2, for loop compensation.
Inverting input of error amplifier 2. Normally it is connected to
the switching power supply output.
Output 2 disable. A logic low at this pin disables V
OUT2
.
5.0V reference output. It can source current in excess of 30mA.
The positive supply of the IC. The minimum operating voltage
after start-up is 8.8V.
Typical Performance Characteristics
Timing Resistor vs. Oscillator Frequency
16
14
F
2.2n
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
C
T
R
T
V
FB1
COMP
1
SENSE
1
V
OUT1
Gnd
Pwr Gnd
V
OUT2
SENSE
2
COMP
2
V
FB2
ENABLE
2
V
REF
V
CC
Max. Output Duty Cycle vs. Oscillator Frequency
50
MAXIMUM DUTY CYCLE (%)
R
T
TIMING RESISTOR (KΩ)
100p
1.0n
F
48
46
44
42
40
38
10k
V
CC
= 15V
R
T
= 4.0kΩ to 16kΩ
C
L
= 15pF
T
A
= 25°C
30k
50k
100k
300k
500k
1.0M
pF
220
pF
330
pF
500
F
nF
3.3
12
C
T
=
10n
F
5.0
nF
10
8.0
V
CC
=
6.0 15V
T
A
=25°C
4.0
10k
30k
50k
100k
300k
500k
1.0M
f
OSC
OSCILLATOR FREQUENCY (Hz)
f
OSC
OSCILLATOR FREQUENCY (Hz)
Error Amp Open-Loop Gain & Phase vs. Frequency
A
VOL
, OPEN-LOOP VOLTAGE GAIN (dB)
100
80
60
40
20
0
-20
10k
GAIN
V
CC
= 15V
V
O
= 1.5V TO 2.5V
R
L
= 100kΩ
T
A
= 25°C
PHASE
0
Phase Margin (DEGREES)
Vth, CURRENT SENSE
INPUT THRESHHOLD (V)
Current Sense Input Threshold
vs. Error Amp Output Voltage
1.2
V
CC
= 15V
1.0
0.8
0.6
0.4
0.2
0
0
1.0
2.0
3.0
4.0
5.0
6.0
7.0
ERROR AMP OUTPUT VOLTAGE (V)
T
A
= 125°C
T
A
= 25°C
T
A
= -55°C
30
60
90
120
150
180
10M
100k
1.0k
10k
100k
1.0M
f, FREQUENCY (Hz)
4
CS5661
Typical Performance Characteristics: continued
Reference Voltage Change vs. Source Current
0
V
CC
= 15V
∆
V
REF
, REFERENCE
Voltage (mV)
-4.0
-8.0
-12
-16
-20
-24
0
20
40
60
80
100
I
ref
, REFERENCE SOURCE CURRENT (mA)
120
T
A
= 125°C
T
A
=
25°C
Reference Short Circuit Current vs. Temperature
I
SC
, REFERENCE
SHORT CIRCUIT CURRENT (mA)
120
T
A
= –55°C
100
80
60
-55
-25
0
25
50
75
100
125
T
A
, AMBIENT TEMPERATURE (°C)
Output Saturation Voltage vs. Load Current
0
V
CC
SOURCE SATURATION
(LOAD TO GROUND)
V
CC
=15V
80µS PULSED LOAD
120Hz RATE
T
A
=25°C
Supply Current vs. Supply Voltage
32
I
CC,
SUPPLY CURRENT (mA)
R
T
=8.2kΩ
C
T
=3.3nF
V
FB
1, 2=0V
CURRENT SENSE 1, 2=0V
T
A
=25°C
V
sat
, OUTPUT
SATURATION VOLTAGE (V)
-1.0
-2.0
24
T
A
= –55°C
16
2.0
1.0
0
0
T
A
= –55°C
T
A
=25°C
GND
8.0
SINK
SATURATION
(LOAD TO V
CC
)
0
800
8.4
V
CC,
SUPPLY VOLTAGE (V) - CS-5661
200
400
600
OUTPUT LOAD CURRENT (mA)
Operating Description
The CS5661 is a high performance, fixed frequency, dual
channel current mode PWM controller for Off-Line and
DC to DC converter applications. Each channel contains a
high gain error amplifier, current sensing comparator,
pulse width modulator latch, and totem pole output driv-
er. The oscillator, reference, and undervoltage lockout cir-
cuits are common to both channels.
Oscillator
making this controller suitable for high frequency power
conversion applications.
In noise sensitive applications it may be necessary to syn-
chronize the converter with an external system clock. This
can be accomplished by applying an external clock signal.
For reliable synchronization, the oscillator frequency
should be set about 10% slower than the clock frequency.
The rising edge of the clock signal applied to SYNC, termi-
nates the charging of C
T
and V
OUT2
conduction. By tailor-
ing the clock waveform symmetry, accurate duty cycle
clamping of either output can be achieved.
Error Amplifier
The oscillator has both precise frequency and duty cycle
control. The oscillator frequency is programmed by the
timing components R
T
and C
T
. Capacitor C
T
is charged
and discharged by an equal magnitude internal current
source and sink that generates a symmetrical 50 percent
duty cycle waveform at C
T
. The oscillator peak and valley
thresholds are 3.5V and 1.6V respectively. The source/
sink current is controlled by resistor R
T
. For proper opera-
tion over temperature range R
T
’s value should be between
4.0kΩ to 16kΩ.
As C
T
charges and discharges, an internal blanking pulse
is generated that alternately drives the inputs of the upper
and lower NOR gates high. This, in conjunction with a
precise amount of delay time introduced into each chan-
nel, produces well defined non-overlapping output duty
cycles. Output 2 is enabled while C
T
is charging, and
Output 1 is enabled during the discharge. Even at 500kHz,
each output is capable of approximately 44% duty cycle,
5
Each channel contains a fully-compensated error amplifier
with access to the output and inverting input. The amplifi-
er features a typical dc voltage gain of 100 dB, and a unity
gain bandwidth of 1.0 MHz with 71 degrees of phase mar-
gin. The non-inverting input is internally biased at 2.5V.
The converter output voltage is typically divided down
and monitored by the inverting input through a resistor
divider. The maximum input bias current is -1.0 µA which
will cause an output voltage error that is equal to the
product of the input bias current and the equivalent input
divider resistance.
Its output voltage is offset by two diode drops (≈1.4V) and
divided by three before it connects to the inverting input
of the current sense comparator. This guarantees that both
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