A27020 Series
256K X 8 OTP CMOS EPROM
Features
262,144 X 8 bit organization
Programming voltage: 12.25V
Access time: 55/70 ns (max.)
Current: Operating: 30mA (max.) at 5MHz
Standby:
100μA (max.)
All inputs and outputs are directly TTL-compatible
Available in 32-pin DIP and 32-pin PLCC packages
All Pb-free (Lead-free) products are RoHS compliant
General Description
The A27020 chip is a high-performance 2,097,152 bit
one-time programmable read only memory (OTP
EPROM) organized as 256K by 8 bits. The A27020
requires only 5V power supply in normal read mode
operation and any input signals are TTL levels. The
A27020 is available in industry standard 32 pin dual-in-
line and 32 pin PLCC packages.
Pin Configurations
DIP
PLCC
A12
A15
A16
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O
0
I/O
1
I/O
2
GND
2
3
4
5
6
31
30
29
28
27
PGM
A17
32
31
A14
A7
A13
A6
A8
A9
A11
OE
A10
CE
I/O
7
I/O
6
I/O
5
I/O
2
I/O
3
I/O
4
GND
I/O
1
I/O
4
I/O
3
I/O
5
I/O
6
A5
A4
A3
A2
A1
A0
I/O
0
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
5
30
29
28
27
26
4
3
2
1
A14
A13
A8
A9
A11
OE
A10
CE
I/O
7
7
8
9
10
11
12
13
14
15
16
26
25
24
23
22
21
20
19
18
17
A27020L
A17
25
24
23
22
21
VPP
1
32
VCC
(October, 2010, Version 1.3)
1
AMIC Technology, Corp.
PGM
VCC
VPP
A27020
A27020 Series
Functional Description
Read Mode
The A27020 has two control functions, both of which
must be logically active in order to obtain data at the
outputs.
CE is the power control and should be used for
device selection. OE is the output control and should
be used to data to the output pins, which is independent
of device selection. Assuming that addresses are stable,
address access time (t
AA
) is equal to the delay from CE
to output (t
CE
). Data is available at the output after a
delay (t
OE
) from the falling edge of OE , as long as CE
has been low and the addresses have been stable for at
least t
ACC
- t
OE
.
Auto Identify Mode
The auto identify mode allows the reading out of a binary
code from a EPROM that will identify its manufacturer
and type. This mode is intended for use by programming
equipment for the purpose of automatically matching the
device to be programmed with its corresponding
programming algorithm.
To activate the mode, the programming equipment must
apply 12.0V
±
0.5V on address line A9 of the A27020.
Three identification code can be read from data output
pin by toggling A0 and A1. The other addresses must be
held at V
IL
during this mode. Byte 0 (with A0 at V
IL
, A1 at
V
IL
) represents the manufacturer code which is 37H.
Byte 1 and Byte 2 represent the device code and
continuation code, which is 64H and 7FH respectively.
All identifiers for these codes will possess odd parity,
with MSB (IO
7
) defined the parity bit.
Standby Mode
The A27020 has a standby mode which reduces the
active current from 30mA to 100
μ
A. The A27020 is
placed in the standby mode by applying a CMOS high
signal to CE . When in the standby mode, the output are
in a high impedance state, independent of the
OE .
Absolute Maximum Ratings*
Ambient Operating Temperature (T
A
) . . ..-10
°
C to +85
°
C
Storage
Temperature
Plastic
Package
(T
STG
) ……………………………………… 55
°
C to 125
°
C
Applied Input Voltage (V
I
):
All Pins Except A9, VPP and VCC . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . .. -0.6V to VCC + 0.6V
A9, VPP.. . . . . . . . . . . . . . . . . . . . . .. .-0.6V to 12.5V
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.6V to 7.0V
Output Voltage (V
O
) . . . . . . . . . . . -0.6V to 6.0V (Note 1)
*Comments
Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to this device.
These are stress ratings only. Functional operation of
this device at these or any other conditions above those
indicated in the operational sections of this specification
is not implied or intended. Exposure to the absolute
maximum rating conditions for extended periods may
affect device reliability.
Notes:
1. During voltage transitions, the input may undershoot GND to -2.0V for periods less than 20 ns. Maximum DC voltage
on input and I/O may overshoot to VCC + 2.0V for periods less than 20 ns.
2. When transitions, A9 and VPP may undershoot GND to -2.0V for periods less than 20 ns. Maximum DC input voltage
on A9 and VPP is +12.5V which may overshoot to 12.7V for period less than 20 ns.
(October, 2010, Version 1.3)
3
AMIC Technology, Corp.
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