EEWORLDEEWORLDEEWORLD

Part Number

Search

BSSH-230-S-12-H

Description
Board Connector, 30 Contact(s), 1 Row(s), Female, Straight, 0.079 inch Pitch, Solder Terminal, Black Insulator, Plug
CategoryThe connector    The connector   
File Size143KB,1 Pages
ManufacturerMajor League Electronics
Websitehttp://www.mlelectronics.com/
Download Datasheet Parametric View All

BSSH-230-S-12-H Overview

Board Connector, 30 Contact(s), 1 Row(s), Female, Straight, 0.079 inch Pitch, Solder Terminal, Black Insulator, Plug

BSSH-230-S-12-H Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
Reach Compliance Codecompliant
ECCN codeEAR99
Other featuresNONE
body width0.079 inch
subject depth0.442 inch
body length2.374 inch
Body/casing typePLUG
Connector typeBOARD CONNECTOR
Contact to complete cooperationGOLD (30) OVER NICKEL (50)
Contact completed and terminatedTin/Lead (Sn/Pb) - with Nickel (Ni) barrier
Contact point genderFEMALE
Contact materialPHOSPHOR BRONZE
contact modeRECTANGULAR
Contact styleSQ PIN-SKT
Insulation resistance5000000000 Ω
Insulator colorBLACK
insulator materialGLASS FILLED POLYESTER
JESD-609 codee0
Manufacturer's serial numberBSSH
Plug contact pitch0.079 inch
Installation methodSTRAIGHT
Installation typeBOARD
Number of connectorsONE
PCB row number1
Number of rows loaded1
Maximum operating temperature125 °C
Minimum operating temperature-65 °C
PCB contact patternRECTANGULAR
Plating thickness30u inch
Rated current (signal)1 A
GuidelineUL
reliabilityCOMMERCIAL
Terminal length0.131 inch
Terminal pitch2.0066 mm
Termination typeSOLDER
Total number of contacts30
Added a supercapacitor to the pyboardCN
[i=s]This post was last edited by dcexpert on 2018-4-7 18:06[/i] In order to test the function of RTC, a super capacitor was added to the first version of pyboardCN to power VBat. A 0.22F super capaci...
dcexpert MicroPython Open Source section
Addition and Multiplication in FPGA Design
In FPGA design, addition, subtraction, and multiplication are described using Verilog HDL language. It is very simple, directly +, -, *, without any doubt, but the bit width of the signal in the calcu...
tx_xy FPGA/CPLD
The first article introduces Ansys software
[size=2]I have played with Ansys software for a few days and found it quite interesting and helpful. Judging from the online charges, it is also good for commercial use. In the following articles, I w...
wugx Industrial Control Electronics
Altera board JTAG cannot burn program
[i=s] This post was last edited by ligongxiaobie on 2014-10-31 10:35 [/i] [color=#ff0000] Now a new phenomenon has appeared. A board can be programmed using JTAG. CONF_DONE is also set high, and the n...
ligongxiaobie FPGA/CPLD
Route Binding
Hello everyone, when I modify the route binding program, it always shows "Match Desc Req", "Non Matched", and no match is found. Can you provide me with some advice?...
林晓松 RF/Wirelessly
Is there anyone here who likes Jane Zhang’s music?
Some of them are here! Go to the 50th floor to release a series of beautiful MVs of Jane Zhang~...
richiefang Talking

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 487  1601  2773  2278  2296  10  33  56  46  47 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号