UNISONIC TECHNOLOGIES CO., LTD
MJE13003-R
NPN SILICON POWER
TRANSISTOR
DESCRIPTION
These devices are designed for high-voltage, high-speed
power switching inductive circuits where fall time is critical. They
are particularly suited for 115 and 220V applications in switch
mode.
NPN SILICON TRANSISTOR
FEATURES
* Reverse biased SOA with inductive load @ T
C
=100°C
* Inductive switching matrix 0.5 ~ 1.5 Amp, 25 and 100°C
Typical t
C
= 290ns @ 1A, 100°C.
* 700V blocking capability
APPLICATIONS
* Switching regulator’s, inverters
* Motor controls
* Solenoid/relay drivers
* Deflection circuits
ORDERING INFORMATION
Ordering Number
Halogen-Free
MJE13003G-R-x-T92-B
MJE13003G-R-x-T92-K
B: Base
C: Collector
Package
TO-92
TO-92
Pin Assignment
1
2
3
B
C
E
B
C
E
Packing
Tape Box
Bulk
Lead Free
MJE13003L-R-x-T92-B
MJE13003-L-R-x-T92-K
Note: Pin assignment: E: Emitter
MARKING
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MJE13003-R
NPN SILICON TRANSISTOR
UNIT
V
V
V
A
A
A
W
W
°C
°C
ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYMBOL
RATINGS
Collector-Emitter Voltage
V
CEO(SUS)
400
Collector-Base Voltage
V
CBO
700
Emitter Base Voltage
V
EBO
9
Continuous
I
C
1.5
Collector Current
Peak (1)
I
CM
3
Continuous
I
B
0.75
Base Current
Peak (1)
I
BM
1.5
Continuous
I
E
2.25
Emitter Current
Peak (1)
I
EM
4.5
T
A
=25°C
1.1
Power Dissipation
P
D
T
C
=25°C
1.5
Junction Temperature
T
J
+150
Storage Temperature
T
STG
-55 ~ +150
Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.
ELECTRICAL CHARACTERISTICS
(T
C
=25°C, unless otherwise specified.)
SYMBOL
V
CEO(SUS)
T
C
=25°C
T
C
=100°C
I
CEO
I
EBO
Is/b
RB
SOA
h
FE1
h
FE2
V
CE(SAT)
I
C
=0.5A, V
CE
=5V
I
C
=1A, V
CE
=5V
I
C
=0.5A, I
B
=0.1A
I
C
=1A, I
B
=0.25A
I
C
=1.5A, I
B
=0.5A
I
C
=1A, I
B
=0.25A, T
C
=100°C
I
C
=0.5A, I
B
=0.1A
I
C
=1A, I
B
=0.25A
I
C
=1A, I
B
=0.25A, T
C
=100°C
I
C
=100mA, V
CE
=10V, f=1MHz
V
CB
=10V, I
E
=0, f=0.1MHz
TEST CONDITIONS
I
C
=10mA , I
B
=0
V
CEO
=Rated Value,
V
BE(OFF)
=1.5 V
V
EB
=9V, I
C
=0
MIN TYP MAX UNIT
400
1
5
1
See Fig.5
See Fig.6
14
5
57
30
0.5
1
3
1
1
1.2
1.1
10
21
V
mA
mA
PARAMETER
OFF CHARACTERISTICS
(Note)
Collector-Emitter Sustaining Voltage
Collector Cutoff Current
Emitter Cutoff Current
SECOND BREAKDOWN
Second Breakdown Collector Current with bass
forward biased
Clamped Inductive SOA with base reverse biased
ON CHARACTERISTICS
(Note)
DC Current Gain
Collector-Emitter Saturation Voltage
V
Base-Emitter Saturation Voltage
DYNAMIC CHARACTERISTICS
Current-Gain-Bandwidth Product
Output Capacitance
SWITCHING CHARACTERISTICS
Resistive Load (Table 1)
Delay Time
Rise Time
Storage Time
Fall Time
Inductive Load, Clamped (Table 1)
Storage Time
Crossover Time
Fall Time
Note: Pulse Test: PW=300μs, Duty Cycle≤2%
V
BE(SAT)
V
f
T
C
OB
4
MHz
pF
t
D
t
R
t
S
t
F
t
STG
t
C
t
F
V
CC
=125V, I
C
=1A,
B1
=I
B2
=0.2A,
t
P
=25μs, Duty Cycle≤1%
0.05
0.5
2
0.4
0.1
1
4
0.7
μs
μs
μs
μs
μs
μs
μs
I
C
=1A, V
CLAMP
=300V, I
B1
=0.2A,
V
BE(OFF)
=5V
DC
, T
C
=100°C
1.7
4
0.29 0.75
0.15
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MJE13003-R
CLASSIFICATION OF h
FE1
RANK
RANGE
A
14 ~ 22
B
21 ~ 27
C
26 ~ 32
D
31 ~ 37
E
36 ~ 42
NPN SILICON TRANSISTOR
F
41 ~ 47
G
46 ~ 52
H
51 ~ 57
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APPLICATION INFORMATION
NPN SILICON TRANSISTOR
Table 1.Test Conditions for Dynamic Performance
Reverse Bias Safe Operating Area and Inductive Switching
Resistive
Switching
+125V
Test Circuits
Rc
TUT
R
B
D1
-4.0V
SCOPE
Circuit Values
Coil Data :
V
CC
=20V
Ferroxcube core #6656
V
CLAMP
=300V
Full Bobbin ( ~ 200 Turns) #20
GAP for 30 mH/2 A
L
COIL
=50mH
V
CC
=125V
R
C
=125Ω
D1=1N5820 or
Equiv.
R
C
=47Ω
Output Waveforms
Test Waveforms
+10.3 V
25μS
0
-8.5V
tr, tf<10ns
Duty Cycly=1.0%
R
B
and Rc adjusted
for desired I
B
and Ic
Table 2. Typical Inductive Switching Performance
Ic
(A)
Tc
(°C)
t
sv
(μs)
t
RV
(μs)
t
FI
(μs)
t
TI
(μs)
tc
(μs)
I
C
I
CPK
90% V
clamp
t
sv
t
RV
t
c
V
CLAMP
90% Ic
t
FI
t
TI
0.5
25
100
25
100
25
100
1.3
1.6
1.5
1.7
1.8
3
0.23 0.30
0.26 0.30
0.10
0.13
0.35 0.30
0.40 0.36
1
0.14 0.05 0.16
0.26 0.06 0.29
V
CE
I
B
90% I
B1
10% V
CLAMP
10%
I
CPK
2% Ic
1.5
0.07 0.10 0.05 0.16
0.08 0.22 0.08 0.28
Time
Fig.1 Inductive Switching Measurements
Note: All Data Recorded in the Inductive Switching
Circuit in Table 1
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SWITCHING TIMES NOTE
NPN SILICON TRANSISTOR
In resistive switching circuits, rise, fall, and storage times have been defined and apply to both current and voltage
waveforms since they are in phase. However, for inductive loads, which are common to switch mode power supplies
and hammer drivers, current and voltage waveforms are not in phase. Therefore, separate measurements must be
made on each waveform to determine the total switching time. For this reason, the following new terms have been
defined.
t
SV
= Voltage Storage Time, 90% I
B1
to 10% V
CLAMP
t
RV
= Voltage Rise Time, 10 ~ 90% V
CLAMP
t
FI
= Current Fall Time, 90 ~ 10% I
C
t
TI
= Current Tail, 10 ~ 2% I
C
t
C
= Crossover Time, 10% V
CLAMP
to 10% I
C
For the designer, there is minimal switching loss during storage time and the predominant switching power losses
occur during the crossover interval and can be obtained using the standard equation:
P
SWT
= 1/2 V
CC
I
C
(t
C
) f
In general, t
RV
+ t
FI
≈
t
C
. However, at lower test currents this relationship may not be valid.
As is common with most switching transistors, resistive switching is specified at 25°C and has become a
benchmark for designers. However, for designers of high frequency converter circuits, the user oriented
specifications which make this transistor are the inductive switching speeds (t
C
and t
SV
) which are guaranteed at
100°C.
RESISTIVE SWITCHING PERFORMANCE
2
10
7
1
0.7
0.5
t
R
Vcc=125V
Ic/I
B
=5
T
J
=25°C
Time, t (°C)
t
s
5
3
2
Vcc=125V
Ic/I
B
=5
T
J
=25°C
Time, t (°C)
0.3
0.2
1
0.7
0.5
0.3
0.2
0.1
0.07
0.05
0.03
0.02
t
D
@ V
BE(OFF)
=5V
t
F
0.02 0.03
0.05 0.07 0.1
0.2
0.3
0.5 0.7
10
20
0.1
0.02 0.03
0.05 0.07 0.1
0.2
0.3
0.5
0.7
1
2
Collector Current, I
C
(A)
Collector Current, I
C
(A)
Fig.2 Turn-On Time
Fig.3 Turn-Off Time
Effective Transient Thermal
Resistance, R(t) (Normalized)
Fig.4 Thermal Response
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