PD - 95301
HEXFET
®
Power MOSFET
l
l
l
l
l
l
l
l
IRF7403PbF
S
S
S
G
1
2
3
4
8
7
Generation V Technology
Ultra Low On-Resistance
N-Channel Mosfet
Surface Mount
Available in Tape & Reel
Dynamic dv/dt Rating
Fast Switching
Lead-Free
A
A
D
D
D
D
V
DSS
= 30V
R
DS(on)
= 0.022Ω
6
5
Top View
Description
Fifth Generation HEXFETs from International Rectifier utilize advanced processing
techniques to achieve the lowest possible on-resistance per silicon area. This
benefit, combined with the fast switching speed and ruggedized device design that
HEXFET Power MOSFETs are well known for, provides the designer with an
extremely efficient device for use in a wide variety of applications.
The SO-8 has been modified through a customized leadframe for enhanced
thermal characteristics and multiple-die capability making it ideal in a variety of
power applications. With these improvements, multiple devices can be used in
an application with dramatically reduced board space. The package is designed
for vapor phase, infra red, or wave soldering techniques. Power dissipation of
greater than 0.8W is possible in a typical PCB mount application.
SO-8
Absolute Maximum Ratings
Parameter
I
D
@ T
A
= 25°C
I
D
@ T
A
= 25°C
I
D
@ T
A
= 70°C
I
DM
P
D
@T
A
= 25°C
V
GS
dv/dt
T
J,
T
STG
10 Sec. Pulsed Drain Current, V
GS
@ 10V
Continuous Drain Current, V
GS
@ 10V
Continuous Drain Current, V
GS
@ 10V
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Peak Diode Recovery dv/dt
Junction and Storage Temperature Range
Max.
9.7
8.5
5.4
34
2.5
0.02
±20
5.0
-55 to + 150
Units
A
W
W/°C
V
V/ns
°C
Thermal Resistance Ratings
Parameter
R
θJA
Maximum Junction-to-Ambient
Typ.
Max.
50
Units
°C/W
9/30/04
IRF7403PbF
Electrical Characteristics @ T
J
= 25°C (unless otherwise specified)
V
(BR)DSS
∆V
(BR)DSS
/∆T
J
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Transconductance
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Internal Drain Inductance
Internal Source Inductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
R
DS(ON)
V
GS(th)
g
fs
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
D
L
S
C
iss
C
oss
C
rss
Min.
30
1.0
8.4
Typ.
0.024
10
37
42
40
2.5
4.0
Max. Units
Conditions
V
V
GS
= 0V, I
D
= 250µA
V/°C Reference to 25°C, I
D
= 1mA
0.022
V
GS
= 10V, I
D
= 4.0A
Ω
0.035
V
GS
= 4.5V, I
D
= 3.4A
V
V
DS
= V
GS
, I
D
= 250µA
S
V
DS
= 15V, I
D
= 4.0A
1.0
V
DS
= 24V, V
GS
= 0V
µA
25
V
DS
= 24V, V
GS
= 0V, T
J
= 125°C
100
V
GS
= 20V
nA
-100
V
GS
= -20V
57
I
D
= 4.0A
6.8
nC V
DS
= 24V
18
V
GS
= 10V, See Fig. 6 and 12
V
DD
= 15V
I
D
= 4.0A
ns
R
G
= 6.0Ω
R
D
= 3.7Ω, See Fig. 10
nH
pF
D
Between lead tip
and center of die contact
V
GS
= 0V
V
DS
= 25V
= 1.0MHz, See Fig. 5
G
S
1200
450
160
Source-Drain Ratings and Characteristics
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
Min. Typ. Max. Units
52
93
3.1
A
34
1.0
78
140
V
ns
nC
Conditions
D
MOSFET symbol
showing the
G
integral reverse
p-n junction diode.
S
T
J
= 25°C, I
S
= 2.0A, V
GS
= 0V
T
J
= 25°C, I
F
= 4.0A
di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
+L
D
)
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Pulse width
≤
300µs; duty cycle
≤
2%.
I
SD
≤
4.0A, di/dt
≤
180A/µs, V
DD
≤
V
(BR)DSS
,
T
J
≤
150°C
Surface mounted on FR-4 board, t
≤
10sec.
IRF7403PbF
1000
I , Drain-to-Source Current (A)
D
I , Drain-to-Source Current (A)
D
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
TOP
1000
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
TOP
100
100
4.5V
4.5V
10
10
1
0.01
20µs PULSE WIDTH
T
J
= 25°C
0.1
1
10
A
100
1
0.01
20µs PULSE WIDTH
T
J
= 150°C
0.1
1
10
A
100
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1.
Typical Output Characteristics
Fig 2.
Typical Output Characteristics
R
DS(on)
, Drain-to-Source On Resistance
(Normalized)
1000
2.0
I
D
= 6.7A
I
D
, Drain-to-Source Current (A)
1.5
T
J
= 25
°
C
100
1.0
T
J
= 150
°
C
0.5
10
V DS = 50V
15V
20µs PULSE WIDTH
4
5
6
7
8
9
10
0.0
-60
-40
-20
0
20
40
60
80
V
GS
= 10V
100 120 140 160
A
V
GS
, Gate-to-Source Voltage (V)
T
J
, Junction Temperature (°C)
Fig 3.
Typical Transfer Characteristics
Fig 4.
Normalized On-Resistance
Vs. Temperature
IRF7403PbF
2400
2000
C, Capacitance (pF)
1600
C
iss
C
oss
1200
V
GS
, Gate-to-Source Voltage (V)
V
GS
= 0V,
f = 1MHz
C
iss
= C
gs
+ C
gd
, C
ds
SHORTED
C
rss
= C
gd
C
oss
= C
ds
+ C
gd
20
I
D
= 4.0A
V
DS
= 24V
16
12
8
800
C
rss
400
4
0
1
10
100
A
0
0
10
20
30
FOR TEST CIRCUIT
SEE FIGURE 12
40
50
60
A
V
DS
, Drain-to-Source Voltage (V)
Q
G
, Total Gate Charge (nC)
Fig 5.
Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6.
Typical Gate Charge Vs.
Gate-to-Source Voltage
100
100
I
SD
, Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
10
I
D
, Drain Current (A)
100us
T
J
= 150°C
1
T = 25°C
J
10
1ms
0.1
0.0
0.5
1.0
1.5
2.0
V
GS
= 0V
2.5
A
3.0
1
0.1
T
A
= 25 ° C
T
J
= 150 ° C
Single Pulse
1
10
10ms
100
V
SD
, Source-to-Drain Voltage (V)
V
DS
, Drain-to-Source Voltage (V)
Fig 7.
Typical Source-Drain Diode
Forward Voltage
Fig 8.
Maximum Safe Operating Area
IRF7403PbF
V
DS
10.0
R
D
V
GS
R
G
10 V
Pulse Width
≤ 1
µs
Duty Factor
≤ 0.1 %
D.U.T.
+
-
V
DD
8.0
I
D
, Drain Current (A)
6.0
Fig 10a.
Switching Time Test Circuit
4.0
V
DS
90%
2.0
0.0
25
50
75
100
125
150
T
C
, Case Temperature ( °C)
10%
V
GS
t
d(on)
t
r
t
d(off)
t
f
Fig 9.
Maximum Drain Current Vs.
Ambient Temperature
Fig 10b.
Switching Time Waveforms
100
Thermal Response (Z
thJA
)
D = 0.50
0.20
0.10
0.05
0.02
1
0.01
SINGLE PULSE
(THERMAL RESPONSE)
P
DM
t
1
t
2
Notes:
1. Duty factor D = t
1
/ t
2
2. Peak T
J
= P
DM
x Z
thJA
+ T
A
0.01
0.1
1
10
100
10
0.1
0.0001
0.001
t
1
, Rectangular Pulse Duration (sec)
Fig 11.
Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
京公网安备 11010802033920号
EEWORLD
