WRIMD-184-A3A-2BLP datasheet, PDF

WRIMD-184-A3A-2BLP: DescriptionCard Edge Connector, 184 Contact(s), 2 Row(s), Straight, 0.039 inch Pitch, Solder Terminal, Latch & Eject, Black Insulator, Receptacle; CategoryThe connector The connector; File Size531KB，3 Pages; ManufacturerWin Win Precision Industrial Co., Ltd.

Download Datasheet Parametric View All

WRIMD-184-A3A-2BLP Overview

Card Edge Connector, 184 Contact(s), 2 Row(s), Straight, 0.039 inch Pitch, Solder Terminal, Latch & Eject, Black Insulator, Receptacle

Parameter Name	Attribute value
Reach Compliance Code	unknown
ECCN code	EAR99
Other features	LOW EJECTOR
Board mount options	SPLIT BOARD LOCK
body width	0.299 inch
body length	5.551 inch
Body/casing type	RECEPTACLE
Connector type	CARD EDGE CONNECTOR
Contact to complete cooperation	AU ON NI
Contact completed and terminated	TIN/LEAD OVER NICKEL
Contact material	PHOSPHOR BRONZE
Contact resistance	20 mΩ
Contact style	BELLOWED TYPE
Dielectric withstand voltage	500VAC V
maximum insertion force	.8618 N
Insulation resistance	1000000 Ω
Insulator color	BLACK
insulator material	POLYBUTYLENE TEREPHTHALATE
Manufacturer's serial number	WRIMD
Plug contact pitch	0.039 inch
Installation option 1	LATCH & EJECT
Installation option 2	LOCKING
Installation method	STRAIGHT
Installation type	BOARD
Number of connectors	ONE
PCB row number	4
Number of rows loaded	2
Maximum operating temperature	105 °C
Minimum operating temperature	-55 °C
PCB contact pattern	MIXED
PCB contact row spacing	0.063 mm
Plating thickness	FLASH inch
polarization key	POLARIZED HOUSING
Rated current (signal)	0.5 A
Guideline	UL
reliability	COMMERCIAL
Terminal length	0.093 inch
Terminal pitch	2.0066 mm
Termination type	SOLDER
Total number of contacts	184
Evacuation force-minimum value	.3614 N

FPGA integrated circuit written test and interview questions and answers 20171012 (serial to be continued): [align=left] [/align][align=left] [/align][align=left] [/align][align=center]FPGA/Integrated Circuit[/align][align=center]Written Interview Questions and Answers[ /align][align=left] [/align][align=le...; xuehua_12 FPGA/CPLD

Anti-electromagnetic interference technology in signal transmission: During the transmission process of the large centrifugal compressor condition monitoring system, the vibration and temperature signals are subject to unknown electromagnetic interference, causing irre...; 18015858399 TI Technology Forum

Two FPGA boards: [i=s] This post was last edited by Shuiqingwuyu on 2015-5-17 20:54 [/i] [b](The first one has been released) [/b] The first one is suitable for getting started with FPGA. I bought it with privileges. ...; 水清无鱼 Buy&Sell

ADI Power Supply Design Guide: ADI Power Supply Design Guide...; 欧阳疯 Power technology

msp430 about ADC and keyboard interrupt nesting: [i=s] This post was last edited by paulhyde on 2014-9-15 04:00 [/i] ADC sampling interrupt and keyboard interrupt cannot be used together. There is no problem with the individual modules. Why is this?...; dqkong_90 Electronics Design Contest

Question about ISA bus, I/O Read pin: The IO Read pin should be at a low level when there is input, and should be always high when there is no input, but mine is 2.5V, and it should be 4.8V if it is high. This causes the industrial comput...; csfang Embedded System

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components