a
FEATURES
Gain of 400. Alterable from 40 to 1000
Output Span 20 mV to (V
S
– 0.25) V
1 Pole Low-Pass Filtering Available
Offset Capability
Differential Input Resistance 230 k
Drives 1 k Load to +4 V Using V
S
= +5 V
Supply Voltage: +3 V to +36 V
Transient Spike Protection and RFI Filters Included
Peak Input Voltage (40 ms): 60 V
Reversed Supply Protection: –34 V
Operating Temperature Range: –40 C to +125 C
APPLICATIONS
Interface for Pressure Transducers, Position
Indicator, Strain Gages and Other Low Level Signal
Sources
IN+ 8
Single Supply Bridge
Transducer Amplifier
AD22055
FUNCTIONAL BLOCK DIAGRAM
+V
S
6
OFS
7
FILT
3
AD22055
A1
IN– 1
A2
5 OUT
4 GAIN
2
GND
GENERAL DESCRIPTION
The AD22055 accepts a differential signal from a bridge trans-
ducer whose common-mode signal can be anywhere between
the power supplies.
The extended temperature range allows for local signal condi-
tioning for oil and hydraulic pressure sensors as well as other
automotive sensors.
The use of an external gain resistor allows the user to compen-
sate transducer gain error and temperature drift.
+5 VOLT
V
REF
OUTPUT
8
7
6
5
IN+ OFS +V
S
OUT
AD22055
IN– GND FILT GAIN
1
2
3
4
1kΩ
GAIN = 400
ANALOG
GROUND
Figure 1. Typical Application Circuit for a Pressure Sensor Interface
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
World Wide Web Site: http://www.analog.com
Fax: 617/326-8703
© Analog Devices, Inc., 1997
AD22055–SPECIFICATIONS
(@ T = + 25 C, V = +5 V, V
A
S
CM
= 0, unless otherwise noted)
Min
0
–80
–60
180
180
Typ
Max
5
–90
–75
230
±
0.5
230
40
+0.02
77.6
80
10
2.0
398
400
–60
–500
0.05
1
–10
3.0
11
30
0.2
0.2
5
200
402
Units
V
dB
dB
kΩ
%
kΩ
Parameter
INPUTS (PINS 1 AND 8)
V
CM
CMRR
LF
CMRR
HF
R
INCM
R
MATCH
R
INDIFF
PREAMPLIFIER
G
CL
V
O
R
O
OUTPUT BUFFER
G
CL
V
O
R
O
OVERALL SYSTEM
G
CL
V
OS
Comments
Common-Mode Range
Common-Mode Rejection Ratio
Common-Mode Rejection Ratio
Common-Mode Input Resistance
Matching of Input Resistances
Differential Input Resistance
Closed-Loop Gain
1
Output Voltage Range (Pin 3)
Output Resistance
2
Closed-Loop Gain
1
Output Voltage Range
Output Resistance (Pin 5)
Gain
1
Gain Drift
Gain Drift
Initial Offset Voltage
3
Offset Drift
Offset Drift
Input Resistance
Short-Circuit Output Current
–3 dB Bandwidth
Slew Rate
Noise Spectral Density
3
Operating Range
Quiescent Supply Current
4
Operating Temperature Range
Test Conditions
f
≤
10 Hz
f = 10 kHz
Pin 1 or Pin 8 to Pin 2
Pin 1 to Pin 8
300
V/V
+4.75 V
82.4
kΩ
10.05
+4.75
V/V
V
Ω
V/V
ppm/°C
ppm/°C
mV
µV/°C
µV/°C
kΩ
mA
kHz
V/µs
µV/√Hz
V
µA
°C
R
LOAD
≥
10 kΩ
V
O
≥
0.1 V dc
V
O
≥
0.1 V dc
–40°C to +125°C
–125°C to +150°C
–40°C to +125°C
–125°C to +150°C
Pin 7 to Pin 2
V
O
= + 1 V dc
f = 100 Hz to 10 kHz
T
A
= T
MIN
to T
MAX
9.95
+0.02
–1
1
I
OSC
BW
–3 dB
SR
N
SD
POWER SUPPLY
V
S
I
S
TEMPERATURE RANGE
T
OP
2.5
7
20
25
3
36
500
+125
–40
NOTES
1
A2 gain is trimmed to
±
0.5% with a 0.01% 1 kΩ resistor to ground from Pin 4. The overall gain is trimmed to a gain of 400
±
0.5% with the same 1 kΩ resistor. The
gain of A1 (the ratio of overall gain to A2 gain) is used to adjust the overall gain and, therefore, is not trimmed explicitly to 40. Note that the actual gain to a particu-
lar application can be modified by the use of an external resistor at Pin 4.
2
The actual output resistance of A1 is only a few ohms, but access to this output, via Pin 3, is always through an 80 k
Ω
resistor, which is trimmed to
±
3%.
3
Referred to the input (Pins 1 and 8).
4
With V
DM
= 0 V. Differential mode signals are referred to as V
DM
, while V
CM
refers to common-mode voltages.
All min and max specifications are guaranteed, although only those marked in
boldface
are tested on all production units at final test.
Specifications subject to change without notice.
–2–
REV. 0
AD22055
ABSOLUTE MAXIMUM RATINGS
1
PRODUCT DESCRIPTION
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . +3 V to +36 V
Peak Input Voltage (40 ms) . . . . . . . . . . . . . . . . . . . . . . . . 60 V
Reversed Continuous Supply Voltage . . . . . . . . . . . . . . –34 V
Operating Temperature . . . . . . . . . . . . . . . . –40°C to +125°C
Storage Temperature . . . . . . . . . . . . . . . . . . –65°C to +150°C
Output Short Circuit Duration . . . . . . . . . . . . . . . . Indefinite
Lead Temperature (Soldering, 60 sec) . . . . . . . . . . . . . +300°C
1
The AD22055 is a single supply difference amplifier consisting
of a precision balanced attenuator, a very low drift preamplifier
and an output buffer amplifier (A1 and A2, respectively, in the
functional block diagram). It has been designed so that small
differential signals, V
DM
, can be accurately amplified and fil-
tered in the presence of large common-mode voltages, V
CM
,
without the use of any other active components.
The common-mode range resistors in this network are trimmed
to match better than one part in 10,000. The resistive attenua-
tor network is situated at the input to the AD22055 (Pins 1
and 8) allowing the common-mode voltage at Pins 1 and 8 to be
two times greater than that which can be tolerated by the actual
input of A1. As a result, the input common-mode range extends
from ground to the power supply voltage.
Two small filter capacitors (not shown) have been included at
the inputs to A1 to minimize the effects of any spurious RF sig-
nals present in the signal.
Internal feedback around A1 sets the closed-loop gain of the
preamplifier to 40 V/V from the input pins, and the output of
A1 is connected to Pin 3 via a 80 kΩ resistor, which is trimmed
to
±
3% to facilitate the low-pass filtering of the signal. The out-
put buffer A2 has a gain of 10 V/V (using a precise 1 kΩ resistor
from Pin 4 to ground) setting the precalibrated, overall gain of
the AD22055, to 400 V/V. This gain is easily user-configurable.
Overall gain is programmed using the following equation:
9
kΩ
Gain
=
40
1
+
R
GAIN
V/V
Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only; the functional
operation of the device at these or any other conditions above those indicated in the
operation sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
ORDERING GUIDE
Temperature
Range
Package
Description
Package
Option*
Model
AD22055N
AD22055R
–40°C to +125°C
Plastic DIP
Plastic SOIC
N-8
SO-8
*N = Plastic DIP; SO = Small Outline Package.
PIN CONNECTION
IN– 1
GND 2
8 IN+
7 OFS
TOP VIEW
FILT 3 (Not to Scale) 6 +V
S
5 OUT
AD22055
GAIN 4
(1)
PIN DESCRIPTION
8-Pin SOIC
Pin
Function
1
2
3
4
5
6
7
8
IN–
Ground
Filter
Gain
Out
+V
S
OFS
IN+
The dynamic properties of the AD22055 are optimized for
interfacing to transducers, particularly those with a Wheatstone
Bridge configuration. Its rejection of large, high frequency,
common-mode signals makes it superior to that of many alter-
native approaches. This is due to the very careful design of
the input attenuator and the integration of this highly balanced,
high impedance system with the preamplifier.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD22055 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. 0
–3–
京公网安备 11010802033920号
EEWORLD
